From 2d174dc79a657f8f6d1916778ea1e075d64ad0f3 Mon Sep 17 00:00:00 2001
From: jaby <jaby@william.zone>
Date: Sun, 8 Jan 2023 13:56:26 +0100
Subject: [PATCH] Fix IO Port code again

---
 include/PSX/System/IOPorts/interrupt_io.hpp | 16 ++++++++++----
 include/PSX/System/IOPorts/ioport.hpp       | 23 ++++++++++-----------
 src/Library/include/GPU/gpu.hpp             |  6 +++---
 3 files changed, 26 insertions(+), 19 deletions(-)

diff --git a/include/PSX/System/IOPorts/interrupt_io.hpp b/include/PSX/System/IOPorts/interrupt_io.hpp
index a31717bf..02007979 100644
--- a/include/PSX/System/IOPorts/interrupt_io.hpp
+++ b/include/PSX/System/IOPorts/interrupt_io.hpp
@@ -17,19 +17,27 @@ namespace JabyEngine {
         static constexpr auto Controller = Bit<uint32_t>(10);
         static constexpr auto LightPen   = Controller;
         
-        __declare_io_port_global(ComplexBitMap<uint32_t>, Status, 0x1F801070);
-        __declare_io_port_global(ComplexBitMap<uint32_t>, Mask,   0x1F801074);
+        struct __no_align IRQStatus : public ComplexBitMap<uint32_t> {
+            __io_port_inherit_complex_bit_map(IRQStatus);
+        };
+
+        struct __no_align IRQMask   : public ComplexBitMap<uint32_t> {
+            __io_port_inherit_complex_bit_map(IRQMask);
+        };
+
+        __declare_io_port_global(IRQStatus, Status, 0x1F801070);
+        __declare_io_port_global(IRQMask,   Mask,   0x1F801074);
 
         static bool is_irq(Bit<uint32_t> irq) {
             return Status.read().is_bit_set(irq);
         }
 
         static void ack_irg(Bit<uint32_t> irq) {
-            //Status.write(Status.read().clear_bit(irq));
+            Status.write(Status.read().clear_bit(irq));
         }
 
         static void enable_irq(Bit<uint32_t> irq) {
-            //Mask.write(Mask.read().set_bit(irq));
+            Mask.write(Mask.read().set_bit(irq));
         }
     }
 }
diff --git a/include/PSX/System/IOPorts/ioport.hpp b/include/PSX/System/IOPorts/ioport.hpp
index bfe304aa..1e9a7036 100644
--- a/include/PSX/System/IOPorts/ioport.hpp
+++ b/include/PSX/System/IOPorts/ioport.hpp
@@ -9,27 +9,26 @@ namespace JabyEngine {
         T value;
 
     public:
-        //For easy access
         constexpr T read() const {
-            return const_cast<volatile IOPort<T>*>(this)->value;
+            return const_cast<const volatile decltype(this)>(this)->value;
         }
 
-        constexpr void write(T value) {
-            const_cast<volatile IOPort<T>*>(this)->value = value;
+        template<typename...ARGS>
+        constexpr void write_combined(const ARGS&... value) {
+            IOPort::write(T::with(value...));
         }
 
-        constexpr volatile T& ref() {
-            return const_cast<volatile IOPort<T>*>(this)->value;
+        template<typename S>
+        constexpr void write(const BitRangeValue<S>& value) {
+            IOPort::write(T::with(value));
         }
 
-        constexpr const volatile T& ref() const {
-            return const_cast<volatile IOPort<T>*>(this)->value;
+        constexpr void write(const T& value) {
+            const_cast<volatile decltype(this)>(this)->value = value;
         }
 
-        constexpr IOPort<T>& operator=(T value) {
-            IOPort::write(value);
-            return *this;
-        }
+        // We keep this a POD so we will not add assignment operators anymore
+        // We also removed ref() to be more percise
     };
 
     struct __no_align ubus32_t {
diff --git a/src/Library/include/GPU/gpu.hpp b/src/Library/include/GPU/gpu.hpp
index aa947ef8..66e2396a 100644
--- a/src/Library/include/GPU/gpu.hpp
+++ b/src/Library/include/GPU/gpu.hpp
@@ -74,12 +74,12 @@ namespace JabyEngine {
         }
 
         static void wait_ready_for_CMD() {
-            while(!GPUSTAT.ref().is(GPUStatusRegister::GP0ReadyForCMD));
+            while(!GPUSTAT.read().is(GPUStatusRegister::GP0ReadyForCMD));
         }
 
         namespace DMA {
             static void wait() {
-                while(::JabyEngine::DMA::GPU.channel_ctrl.ref().is(::JabyEngine::DMA::CHCHR::Busy));
+                while(::JabyEngine::DMA::GPU.channel_ctrl.read().is(::JabyEngine::DMA::CHCHR::Busy));
             }
 
             static void end() {
@@ -94,7 +94,7 @@ namespace JabyEngine {
                 }
 
                 static void set_src(uintptr_t adr) {
-                    ::JabyEngine::DMA::GPU.adr.ref().set_value(static_cast<uint32_t>(adr), ::JabyEngine::DMA::MADR::MemoryAdr);
+                    ::JabyEngine::DMA::GPU.adr.write(::JabyEngine::DMA::MADR::MemoryAdr.with(static_cast<uint32_t>(adr)));
                 }
 
                 static void set_dst(const PositionU16& position, const SizeU16& size) {