diff --git a/include/PSX/System/IOPorts/DMA_IO.hpp b/include/PSX/System/IOPorts/DMA_IO.hpp
index b93961d7..dec0cf13 100644
--- a/include/PSX/System/IOPorts/DMA_IO.hpp
+++ b/include/PSX/System/IOPorts/DMA_IO.hpp
@@ -3,140 +3,142 @@
 #include "IOPort.hpp"
 
 namespace DMA {
-    struct __no_align MADR : public ComplexBitMap<uint32_t> {
-        __io_port_inherit_complex_bit_map(MADR);
+    namespace Port {
+        struct __no_align MADR : public ComplexBitMap<uint32_t> {
+            __io_port_inherit_complex_bit_map(MADR);
 
-        static constexpr BitRange<uint32_t> MemoryAdr = BitRange<uint32_t>::from_to(0, 23);
-    };
-
-    struct __no_align BCR : public ComplexBitMap<uint32_t> {
-        __io_port_inherit_complex_bit_map(BCR);
-
-        struct __no_align SyncMode0 {
-            static constexpr BitRange<uint16_t> NumberOfWords = BitRange<uint16_t>::from_to(0, 15);
-            static constexpr Bit<uint16_t>      CD_OneBlock   = 16;
+            static constexpr BitRange<uint32_t> MemoryAdr = BitRange<uint32_t>::from_to(0, 23);
         };
 
-        struct __no_align SyncMode1 {
-            static constexpr BitRange<uint16_t> BlockSize   = BitRange<uint16_t>::from_to(0, 15);
-            static constexpr BitRange<uint16_t> BlockAmount = BitRange<uint16_t>::from_to(16, 31);
+        struct __no_align BCR : public ComplexBitMap<uint32_t> {
+            __io_port_inherit_complex_bit_map(BCR);
+
+            struct __no_align SyncMode0 {
+                static constexpr BitRange<uint16_t> NumberOfWords = BitRange<uint16_t>::from_to(0, 15);
+                static constexpr Bit<uint16_t>      CD_OneBlock   = 16;
+            };
+
+            struct __no_align SyncMode1 {
+                static constexpr BitRange<uint16_t> BlockSize   = BitRange<uint16_t>::from_to(0, 15);
+                static constexpr BitRange<uint16_t> BlockAmount = BitRange<uint16_t>::from_to(16, 31);
+            };
+
+            struct __no_align SyncMode2 {
+            };
         };
 
-        struct __no_align SyncMode2 {
-        };
-    };
+        struct __no_align CHCHR : public ComplexBitMap<uint32_t> {
+            __io_port_inherit_complex_bit_map(CHCHR);
 
-    struct __no_align CHCHR : public ComplexBitMap<uint32_t> {
-        __io_port_inherit_complex_bit_map(CHCHR);
+            enum _SyncMode {
+                Sync0 = 0, //Start immediately,
+                Sync1 = 1, //Sync blocks to DMA requests
+                Sync2 = 2, //Linked List
+            };
 
-        enum _SyncMode {
-            Sync0 = 0, //Start immediately,
-            Sync1 = 1, //Sync blocks to DMA requests
-            Sync2 = 2, //Linked List
+            static constexpr Bit<uint32_t> ManualStart = 28;
+
+            static constexpr Bit<uint32_t> Start = 24;
+            static constexpr auto          Busy  = Start;
+
+            static constexpr BitRange<uint32_t> ChoppingCPUWindowSize = BitRange<uint32_t>::from_to(20, 22);
+            static constexpr BitRange<uint32_t> ChoppingDMAWindowSize = BitRange<uint32_t>::from_to(16, 18);
+
+            static constexpr BitRange<_SyncMode> SyncMode     = BitRange<_SyncMode>::from_to(9, 10);
+            static constexpr auto                UseSyncMode0 = (SyncMode << Sync0);
+            static constexpr auto                UseSyncMode1 = (SyncMode << Sync1);
+            static constexpr auto                UseSyncMode2 = (SyncMode << Sync2);
+
+            static constexpr Bit<uint32_t> UseChopping   = 8;
+
+            static constexpr Bit<uint32_t> MemoryAdrDecreaseBy4 = 1;
+            static constexpr auto          MemoryAdrIncreaseBy4 = !MemoryAdrDecreaseBy4;
+
+            static constexpr Bit<uint32_t> FromMainRAM = 0;
+            static constexpr auto          ToMainRAM   = !FromMainRAM;
+
+            static constexpr CHCHR StartMDECin() {
+                return CHCHR(0x01000201);
+            }
+
+            static constexpr CHCHR StartMDECout() {
+                return CHCHR(0x01000200);
+            }
+
+            static constexpr CHCHR StartGPUReceive() {
+                return CHCHR(0x01000201);
+            }
+
+            static constexpr CHCHR StartCDROM() {
+                return CHCHR(0x11000000);
+            }
+
+            static constexpr CHCHR StartSPUReceive() {
+                return CHCHR(0x01000201);
+            }
+
+            static constexpr CHCHR StartOTC() {
+                return CHCHR(0x11000002);
+            }
         };
 
-        static constexpr Bit<uint32_t> ManualStart = 28;
+        struct __no_align Registers {
+            MADR  adr;
+            BCR   block_ctrl;
+            CHCHR channel_ctrl;
+        };
 
-        static constexpr Bit<uint32_t> Start = 24;
-        static constexpr auto          Busy  = Start;
+        //0: Highest, 7: Lowest
+        typedef uint32_t Priority;
+        static constexpr Priority HighestPriority = 0;
+        static constexpr Priority LowestPriority  = 7;
 
-        static constexpr BitRange<uint32_t> ChoppingCPUWindowSize = BitRange<uint32_t>::from_to(20, 22);
-        static constexpr BitRange<uint32_t> ChoppingDMAWindowSize = BitRange<uint32_t>::from_to(16, 18);
+        struct __no_align DMAControlRegister : public ComplexBitMap<uint32_t> {
+            __io_port_inherit_complex_bit_map(DMAControlRegister);
 
-        static constexpr BitRange<_SyncMode> SyncMode     = BitRange<_SyncMode>::from_to(9, 10);
-        static constexpr auto                UseSyncMode0 = (SyncMode << Sync0);
-        static constexpr auto                UseSyncMode1 = (SyncMode << Sync1);
-        static constexpr auto                UseSyncMode2 = (SyncMode << Sync2);
+            static constexpr Bit<uint32_t>      OTCEnable      = 27;
+            static constexpr BitRange<Priority> OTCPriority    = BitRange<Priority>::from_to(24, 26);
 
-        static constexpr Bit<uint32_t> UseChopping   = 8;
+            static constexpr Bit<uint32_t>      PIOEnable      = 23;
+            static constexpr BitRange<Priority> PIOPriority    = BitRange<Priority>::from_to(20, 22);
 
-        static constexpr Bit<uint32_t> MemoryAdrDecreaseBy4 = 1;
-        static constexpr auto          MemoryAdrIncreaseBy4 = !MemoryAdrDecreaseBy4;
+            static constexpr Bit<uint32_t>      SPUEnable      = 19;
+            static constexpr BitRange<Priority> SPUPriority    = BitRange<Priority>::from_to(16, 18);
 
-        static constexpr Bit<uint32_t> FromMainRAM = 0;
-        static constexpr auto          ToMainRAM   = !FromMainRAM;
+            static constexpr Bit<uint32_t>      CDROMEnable     = 15;
+            static constexpr BitRange<Priority> CDROMPriority   = BitRange<Priority>::from_to(12, 14);
 
-        static constexpr CHCHR StartMDECin() {
-            return CHCHR(0x01000201);
-        }
+            static constexpr Bit<uint32_t>      GPUEnable       = 11;
+            static constexpr BitRange<Priority> GPUPriority     = BitRange<Priority>::from_to(8, 10);
 
-        static constexpr CHCHR StartMDECout() {
-            return CHCHR(0x01000200);
-        }
+            static constexpr Bit<uint32_t>      MDECoutEnable   = 7;
+            static constexpr BitRange<Priority> MDECoutPriority = BitRange<Priority>::from_to(4, 6);
 
-        static constexpr CHCHR StartGPUReceive() {
-            return CHCHR(0x01000201);
-        }
+            static constexpr Bit<uint32_t>      MDECinEnable    = 3;
+            static constexpr BitRange<Priority> MDECinPriority  = BitRange<Priority>::from_to(0, 2);
+        };
 
-        static constexpr CHCHR StartCDROM() {
-            return CHCHR(0x11000000);
-        }
+        struct __no_align DMAInterruptRegister : public ComplexBitMap<uint32_t> {
+            __io_port_inherit_complex_bit_map(DMAInterruptRegister);
 
-        static constexpr CHCHR StartSPUReceive() {
-            return CHCHR(0x01000201);
-        }
+            static constexpr Bit<uint32_t>      MasterEnable     = 31;
+            static constexpr BitRange<uint32_t> Flags            = BitRange<uint32_t>::from_to(24, 30);
+            static constexpr Bit<uint32_t>      MasterEnableDPCR = 23;
+            static constexpr BitRange<uint32_t> EnableDPCR       = BitRange<uint32_t>::from_to(16, 22);
+            static constexpr Bit<uint32_t>      ForceIRQ         = 15;
+        };
 
-        static constexpr CHCHR StartOTC() {
-            return CHCHR(0x11000002);
-        }
-    };
+        __declare_io_port_global(Registers, MDECin,  0x1F801080);
+        __declare_io_port_global(Registers, MDECout, 0x1F801090);
+        __declare_io_port_global(Registers, GPU,     0x1F8010A0);
+        __declare_io_port_global(Registers, CDROM,   0x1F8010B0);
+        __declare_io_port_global(Registers, SPU,     0x1F8010C0);
+        __declare_io_port_global(Registers, PIO,     0x1F8010D0);
+        __declare_io_port_global(Registers, OTC,     0x1F8010E0);
 
-    struct __no_align Registers {
-        MADR  adr;
-        BCR   block_ctrl;
-        CHCHR channel_ctrl;
-    };
-
-    //0: Highest, 7: Lowest
-    typedef uint32_t Priority;
-    static constexpr Priority HighestPriority = 0;
-    static constexpr Priority LowestPriority  = 7;
-
-    struct __no_align DMAControlRegister : public ComplexBitMap<uint32_t> {
-        __io_port_inherit_complex_bit_map(DMAControlRegister);
-
-        static constexpr Bit<uint32_t>      OTCEnable      = 27;
-        static constexpr BitRange<Priority> OTCPriority    = BitRange<Priority>::from_to(24, 26);
-
-        static constexpr Bit<uint32_t>      PIOEnable      = 23;
-        static constexpr BitRange<Priority> PIOPriority    = BitRange<Priority>::from_to(20, 22);
-
-        static constexpr Bit<uint32_t>      SPUEnable      = 19;
-        static constexpr BitRange<Priority> SPUPriority    = BitRange<Priority>::from_to(16, 18);
-
-        static constexpr Bit<uint32_t>      CDROMEnable     = 15;
-        static constexpr BitRange<Priority> CDROMPriority   = BitRange<Priority>::from_to(12, 14);
-
-        static constexpr Bit<uint32_t>      GPUEnable       = 11;
-        static constexpr BitRange<Priority> GPUPriority     = BitRange<Priority>::from_to(8, 10);
-
-        static constexpr Bit<uint32_t>      MDECoutEnable   = 7;
-        static constexpr BitRange<Priority> MDECoutPriority = BitRange<Priority>::from_to(4, 6);
-
-        static constexpr Bit<uint32_t>      MDECinEnable    = 3;
-        static constexpr BitRange<Priority> MDECinPriority  = BitRange<Priority>::from_to(0, 2);
-    };
-
-    struct __no_align DMAInterruptRegister : public ComplexBitMap<uint32_t> {
-        __io_port_inherit_complex_bit_map(DMAInterruptRegister);
-
-        static constexpr Bit<uint32_t>      MasterEnable     = 31;
-        static constexpr BitRange<uint32_t> Flags            = BitRange<uint32_t>::from_to(24, 30);
-        static constexpr Bit<uint32_t>      MasterEnableDPCR = 23;
-        static constexpr BitRange<uint32_t> EnableDPCR       = BitRange<uint32_t>::from_to(16, 22);
-        static constexpr Bit<uint32_t>      ForceIRQ         = 15;
-    };
-
-    __declare_io_port_global(Registers, MDECin,  0x1F801080);
-    __declare_io_port_global(Registers, MDECout, 0x1F801090);
-    __declare_io_port_global(Registers, GPU,     0x1F8010A0);
-    __declare_io_port_global(Registers, CDROM,   0x1F8010B0);
-    __declare_io_port_global(Registers, SPU,     0x1F8010C0);
-    __declare_io_port_global(Registers, PIO,     0x1F8010D0);
-    __declare_io_port_global(Registers, OTC,     0x1F8010E0);
-
-    __declare_io_port_global(DMAControlRegister,   DPCR, 0x1F8010F0);
-    __declare_io_port_global(DMAInterruptRegister, DICR, 0x1F8010F4);
+        __declare_io_port_global(DMAControlRegister,   DPCR, 0x1F8010F0);
+        __declare_io_port_global(DMAInterruptRegister, DICR, 0x1F8010F4);
+    }
 }
 
 #endif //!__JABYENGINE_DMA_IO_HPP__
\ No newline at end of file
diff --git a/src/Library/src/BootLoader/spu_boot.cpp b/src/Library/src/BootLoader/spu_boot.cpp
index 8505efcd..9446b243 100644
--- a/src/Library/src/BootLoader/spu_boot.cpp
+++ b/src/Library/src/BootLoader/spu_boot.cpp
@@ -3,7 +3,7 @@
 
 namespace SPU {
     using namespace Port;
-    using namespace DMA;
+    using namespace DMA::Port;
 
     static void clear_key() {
         Key::off.write(UI32_MAX);