diff --git a/include/PSX/GPU/GPU.h b/include/PSX/GPU/GPU.h index b27b9b57..739b3e20 100644 --- a/include/PSX/GPU/GPU.h +++ b/include/PSX/GPU/GPU.h @@ -5,11 +5,11 @@ namespace GPU { namespace Display { static void enable() { - Port::GP1.write(Port::Command::GP1::SetDisplayState(Port::DisplayState::On)); + GP1.write(Command::GP1::SetDisplayState(DisplayState::On)); } static void disable() { - Port::GP1.write(Port::Command::GP1::SetDisplayState(Port::DisplayState::Off)); + GP1.write(Command::GP1::SetDisplayState(DisplayState::Off)); } } } diff --git a/include/PSX/System/IOPorts/DMA_IO.hpp b/include/PSX/System/IOPorts/DMA_IO.hpp index 88c10af2..b9bac2f7 100644 --- a/include/PSX/System/IOPorts/DMA_IO.hpp +++ b/include/PSX/System/IOPorts/DMA_IO.hpp @@ -3,144 +3,142 @@ #include "IOPort.hpp" namespace DMA { - namespace Port { - struct __no_align MADR : public ComplexBitMap { - __io_port_inherit_complex_bit_map(MADR); + struct __no_align MADR : public ComplexBitMap { + __io_port_inherit_complex_bit_map(MADR); - static constexpr auto MemoryAdr = BitRange::from_to(0, 23); + static constexpr auto MemoryAdr = BitRange::from_to(0, 23); + }; + + struct __no_align BCR : public ComplexBitMap { + __io_port_inherit_complex_bit_map(BCR); + + struct __no_align SyncMode0 { + static constexpr auto NumberOfWords = BitRange::from_to(0, 15); + static constexpr auto CD_OneBlock = Bit(16); }; - struct __no_align BCR : public ComplexBitMap { - __io_port_inherit_complex_bit_map(BCR); + struct __no_align SyncMode1 : public ComplexBitMap { + __io_port_inherit_complex_bit_map(SyncMode1); - struct __no_align SyncMode0 { - static constexpr auto NumberOfWords = BitRange::from_to(0, 15); - static constexpr auto CD_OneBlock = Bit(16); - }; - - struct __no_align SyncMode1 : public ComplexBitMap { - __io_port_inherit_complex_bit_map(SyncMode1); - - static constexpr auto BlockSize = BitRange::from_to(0, 15); - static constexpr auto BlockAmount = BitRange::from_to(16, 31); - }; - - struct __no_align SyncMode2 { - }; + static constexpr auto BlockSize = BitRange::from_to(0, 15); + static constexpr auto BlockAmount = BitRange::from_to(16, 31); }; - struct __no_align CHCHR : public ComplexBitMap { - __io_port_inherit_complex_bit_map(CHCHR); + struct __no_align SyncMode2 { + }; + }; - enum _SyncMode { - Sync0 = 0, //Start immediately, - Sync1 = 1, //Sync blocks to DMA requests - Sync2 = 2, //Linked List - }; + struct __no_align CHCHR : public ComplexBitMap { + __io_port_inherit_complex_bit_map(CHCHR); - static constexpr auto ManualStart = Bit(28); - - static constexpr auto Start = Bit(24); - static constexpr auto Busy = Start; - - static constexpr auto ChoppingCPUWindowSize = BitRange::from_to(20, 22); - static constexpr auto ChoppingDMAWindowSize = BitRange::from_to(16, 18); - - static constexpr auto SyncMode = BitRange<_SyncMode>::from_to(9, 10); - static constexpr auto UseSyncMode0 = SyncMode.with(Sync0); - static constexpr auto UseSyncMode1 = SyncMode.with(Sync1); - static constexpr auto UseSyncMode2 = SyncMode.with(Sync2); - - static constexpr auto UseChopping = Bit(8); - - static constexpr auto MemoryAdrDecreaseBy4 = Bit(1); - static constexpr auto MemoryAdrIncreaseBy4 = !MemoryAdrDecreaseBy4; - - static constexpr auto FromMainRAM = Bit(0); - static constexpr auto ToMainRAM = !FromMainRAM; - - static constexpr CHCHR StartMDECin() { - return ComplexBitMap{0x01000201}; - } - - static constexpr CHCHR StartMDECout() { - return ComplexBitMap{0x01000200}; - } - - static constexpr CHCHR StartGPUReceive() { - return ComplexBitMap{0x01000201}; - } - - static constexpr CHCHR StartCDROM() { - return ComplexBitMap{0x11000000}; - } - - static constexpr CHCHR StartSPUReceive() { - return ComplexBitMap{0x01000201}; - } - - static constexpr CHCHR StartOTC() { - return ComplexBitMap{0x11000002}; - } + enum _SyncMode { + Sync0 = 0, //Start immediately, + Sync1 = 1, //Sync blocks to DMA requests + Sync2 = 2, //Linked List }; - struct __no_align Registers { - IOPort adr; - IOPort block_ctrl; - IOPort channel_ctrl; - }; + static constexpr auto ManualStart = Bit(28); - //0: Highest, 7: Lowest - typedef uint32_t Priority; - static constexpr Priority HighestPriority = 0; - static constexpr Priority LowestPriority = 7; + static constexpr auto Start = Bit(24); + static constexpr auto Busy = Start; - struct __no_align DMAControlRegister : public ComplexBitMap { - __io_port_inherit_complex_bit_map(DMAControlRegister); + static constexpr auto ChoppingCPUWindowSize = BitRange::from_to(20, 22); + static constexpr auto ChoppingDMAWindowSize = BitRange::from_to(16, 18); - static constexpr auto OTCEnable = Bit(27); - static constexpr auto OTCPriority = BitRange::from_to(24, 26); + static constexpr auto SyncMode = BitRange<_SyncMode>::from_to(9, 10); + static constexpr auto UseSyncMode0 = SyncMode.with(Sync0); + static constexpr auto UseSyncMode1 = SyncMode.with(Sync1); + static constexpr auto UseSyncMode2 = SyncMode.with(Sync2); - static constexpr auto PIOEnable = Bit(23); - static constexpr auto PIOPriority = BitRange::from_to(20, 22); + static constexpr auto UseChopping = Bit(8); - static constexpr auto SPUEnable = Bit(19); - static constexpr auto SPUPriority = BitRange::from_to(16, 18); + static constexpr auto MemoryAdrDecreaseBy4 = Bit(1); + static constexpr auto MemoryAdrIncreaseBy4 = !MemoryAdrDecreaseBy4; - static constexpr auto CDROMEnable = Bit(15); - static constexpr auto CDROMPriority = BitRange::from_to(12, 14); + static constexpr auto FromMainRAM = Bit(0); + static constexpr auto ToMainRAM = !FromMainRAM; - static constexpr auto GPUEnable = Bit(11); - static constexpr auto GPUPriority = BitRange::from_to(8, 10); + static constexpr CHCHR StartMDECin() { + return ComplexBitMap{0x01000201}; + } - static constexpr auto MDECoutEnable = Bit(7); - static constexpr auto MDECoutPriority = BitRange::from_to(4, 6); + static constexpr CHCHR StartMDECout() { + return ComplexBitMap{0x01000200}; + } - static constexpr auto MDECinEnable = Bit(3); - static constexpr auto MDECinPriority = BitRange::from_to(0, 2); - }; + static constexpr CHCHR StartGPUReceive() { + return ComplexBitMap{0x01000201}; + } - struct __no_align DMAInterruptRegister : public ComplexBitMap { - __io_port_inherit_complex_bit_map(DMAInterruptRegister); + static constexpr CHCHR StartCDROM() { + return ComplexBitMap{0x11000000}; + } - static constexpr auto MasterEnable = Bit(31); - static constexpr auto Flags = BitRange::from_to(24, 30); - static constexpr auto MasterEnableDPCR = Bit(23); - static constexpr auto EnableDPCR = BitRange::from_to(16, 22); - static constexpr auto ForceIRQ = Bit(15); - }; + static constexpr CHCHR StartSPUReceive() { + return ComplexBitMap{0x01000201}; + } - __declare_io_port_global(Registers, MDECin, 0x1F801080); - __declare_io_port_global(Registers, MDECout, 0x1F801090); - __declare_io_port_global_struct(Registers, GPU, 0x1F8010A0); - __declare_io_port_global(Registers, CDROM, 0x1F8010B0); - __declare_io_port_global(Registers, SPU, 0x1F8010C0); - __declare_io_port_global(Registers, PIO, 0x1F8010D0); - __declare_io_port_global(Registers, OTC, 0x1F8010E0); + static constexpr CHCHR StartOTC() { + return ComplexBitMap{0x11000002}; + } + }; - __declare_io_port_global(DMAControlRegister, DPCR, 0x1F8010F0); - __declare_io_port_global(DMAInterruptRegister, DICR, 0x1F8010F4); - } + struct __no_align Registers { + IOPort adr; + IOPort block_ctrl; + IOPort channel_ctrl; + }; + + //0: Highest, 7: Lowest + typedef uint32_t Priority; + static constexpr Priority HighestPriority = 0; + static constexpr Priority LowestPriority = 7; + + struct __no_align DMAControlRegister : public ComplexBitMap { + __io_port_inherit_complex_bit_map(DMAControlRegister); + + static constexpr auto OTCEnable = Bit(27); + static constexpr auto OTCPriority = BitRange::from_to(24, 26); + + static constexpr auto PIOEnable = Bit(23); + static constexpr auto PIOPriority = BitRange::from_to(20, 22); + + static constexpr auto SPUEnable = Bit(19); + static constexpr auto SPUPriority = BitRange::from_to(16, 18); + + static constexpr auto CDROMEnable = Bit(15); + static constexpr auto CDROMPriority = BitRange::from_to(12, 14); + + static constexpr auto GPUEnable = Bit(11); + static constexpr auto GPUPriority = BitRange::from_to(8, 10); + + static constexpr auto MDECoutEnable = Bit(7); + static constexpr auto MDECoutPriority = BitRange::from_to(4, 6); + + static constexpr auto MDECinEnable = Bit(3); + static constexpr auto MDECinPriority = BitRange::from_to(0, 2); + }; + + struct __no_align DMAInterruptRegister : public ComplexBitMap { + __io_port_inherit_complex_bit_map(DMAInterruptRegister); + + static constexpr auto MasterEnable = Bit(31); + static constexpr auto Flags = BitRange::from_to(24, 30); + static constexpr auto MasterEnableDPCR = Bit(23); + static constexpr auto EnableDPCR = BitRange::from_to(16, 22); + static constexpr auto ForceIRQ = Bit(15); + }; + + __declare_io_port_global(Registers, MDECin, 0x1F801080); + __declare_io_port_global(Registers, MDECout, 0x1F801090); + __declare_io_port_global_struct(Registers, GPU, 0x1F8010A0); + __declare_io_port_global(Registers, CDROM, 0x1F8010B0); + __declare_io_port_global(Registers, SPU, 0x1F8010C0); + __declare_io_port_global(Registers, PIO, 0x1F8010D0); + __declare_io_port_global(Registers, OTC, 0x1F8010E0); + + __declare_io_port_global(DMAControlRegister, DPCR, 0x1F8010F0); + __declare_io_port_global(DMAInterruptRegister, DICR, 0x1F8010F4); } #endif //!__JABYENGINE_DMA_IO_HPP__ \ No newline at end of file diff --git a/include/PSX/System/IOPorts/GPU_IO.hpp b/include/PSX/System/IOPorts/GPU_IO.hpp index 8c075f78..9675fc37 100644 --- a/include/PSX/System/IOPorts/GPU_IO.hpp +++ b/include/PSX/System/IOPorts/GPU_IO.hpp @@ -4,125 +4,123 @@ #include "../../GPU/GPU_Types.hpp" namespace GPU { - namespace Port { - enum struct SemiTransparency { - B_Half_add_F_Half = 0, - B_add_F = 1, - B_sub_F = 2, - B_add_F_Quarter = 3, + enum struct SemiTransparency { + B_Half_add_F_Half = 0, + B_add_F = 1, + B_sub_F = 2, + B_add_F_Quarter = 3, + }; + + enum struct TexturePageColor { + _4bit = 0, + _8bit = 1, + _15bit = 2, + }; + + enum struct HorizontalResolution { + _256 = 0, + _320 = 1, + _512 = 2, + _640 = 3, + }; + + enum struct VerticalResolution { + _240 = 0, + _480 = 1 + }; + + enum struct DMADirection { + Off = 0, + Fifo = 1, + CPU2GPU = 2, + GPU2CPU = 3, + }; + + enum struct DisplayState { + On = 0, + Off = 1 + }; + + namespace Command { + struct __no_align GP0 : public ComplexBitMap { + __io_port_inherit_complex_bit_map(GP0); + + static constexpr GP0 QuickFill(Color24 color) { + return ComplexBitMap{(0x02 << 24) | color.raw()}; + } + + static constexpr GP0 CPU2VRAM_Blitting() { + return ComplexBitMap{(0b101u << 29)}; + } + + static constexpr GP0 TopLeftPosition(uint16_t x, uint16_t y) { + return ComplexBitMap{static_cast((y << 16u) | x)}; + } + + static constexpr GP0 WidthHeight(uint16_t w, uint16_t h) { + return ComplexBitMap{static_cast((h << 16u) | w)}; + } }; - enum struct TexturePageColor { - _4bit = 0, - _8bit = 1, - _15bit = 2, + struct __no_align GP1 : public ComplexBitMap { + __io_port_inherit_complex_bit_map(GP1); + + static constexpr uint32_t construct_cmd(uint8_t cmd, uint32_t value) { + return ((cmd << 24) | value); + } + + static constexpr GP1 Reset() { + return ComplexBitMap{0}; + } + + static constexpr GP1 ResetCMDBufer() { + return ComplexBitMap{construct_cmd(0x01, 0)}; + } + + static constexpr GP1 SetDisplayState(DisplayState state) { + return ComplexBitMap{construct_cmd(0x03, static_cast(state))}; + } + + static constexpr GP1 DMADirection(DMADirection dir) { + return ComplexBitMap{construct_cmd(0x04, static_cast(dir))}; + } }; - - enum struct HorizontalResolution { - _256 = 0, - _320 = 1, - _512 = 2, - _640 = 3, - }; - - enum struct VerticalResolution { - _240 = 0, - _480 = 1 - }; - - enum struct DMADirection { - Off = 0, - Fifo = 1, - CPU2GPU = 2, - GPU2CPU = 3, - }; - - enum struct DisplayState { - On = 0, - Off = 1 - }; - - namespace Command { - struct __no_align GP0 : public ComplexBitMap { - __io_port_inherit_complex_bit_map(GP0); - - static constexpr GP0 QuickFill(Color24 color) { - return ComplexBitMap{(0x02 << 24) | color.raw()}; - } - - static constexpr GP0 CPU2VRAM_Blitting() { - return ComplexBitMap{(0b101u << 29)}; - } - - static constexpr GP0 TopLeftPosition(uint16_t x, uint16_t y) { - return ComplexBitMap{static_cast((y << 16u) | x)}; - } - - static constexpr GP0 WidthHeight(uint16_t w, uint16_t h) { - return ComplexBitMap{static_cast((h << 16u) | w)}; - } - }; - - struct __no_align GP1 : public ComplexBitMap { - __io_port_inherit_complex_bit_map(GP1); - - static constexpr uint32_t construct_cmd(uint8_t cmd, uint32_t value) { - return ((cmd << 24) | value); - } - - static constexpr GP1 Reset() { - return ComplexBitMap{0}; - } - - static constexpr GP1 ResetCMDBufer() { - return ComplexBitMap{construct_cmd(0x01, 0)}; - } - - static constexpr GP1 SetDisplayState(DisplayState state) { - return ComplexBitMap{construct_cmd(0x03, static_cast(state))}; - } - - static constexpr GP1 DMADirection(DMADirection dir) { - return ComplexBitMap{construct_cmd(0x04, static_cast(dir))}; - } - }; - } - - struct __no_align GPUStatusRegister : public ComplexBitMap { - static constexpr auto DrawingOddLinesInterlaced = Bit(31); - static constexpr auto DMADirectionValue = BitRange::from_to(29, 30); - static constexpr auto DMAReady = Bit(28); - static constexpr auto VRAMtoCPUtransferReay = Bit(27); - static constexpr auto GP0ReadyForCMD = Bit(26); - static constexpr auto FifoNotFull = Bit(25); // Only for Fifo - static constexpr auto InterruptRequest = Bit(24); - static constexpr auto DisplayDisabled = Bit(23); - static constexpr auto VerticalInterlaceOn = Bit(22); - static constexpr auto DisplayAreaColorDepth24bit = Bit(21); - static constexpr auto VideoModePal = Bit(20); - static constexpr auto VerticalResolutionValue = BitRange::from_to(19, 19); - static constexpr auto HorizontalResolutionValue = BitRange::from_to(17, 18); - static constexpr auto HorizontalResolution368 = Bit(16); - static constexpr auto TexturesDisabled = Bit(15); - static constexpr auto NotDrawingMaskedPixels = Bit(12); - static constexpr auto MaskBitSetDuringDrawEnabled = Bit(11); - static constexpr auto DrawingToDisplayAreadAllowed = Bit(10); - static constexpr auto DitherEnabled = Bit(9); - static constexpr auto TexturePageColorValue = BitRange::from_to(7, 8); - static constexpr auto SemiTransparencyValue = BitRange::from_to(5, 6); - static constexpr auto TexturePageY = BitRange::from_to(4, 4); // N*256 - static constexpr auto TexturePageX = BitRange::from_to(0, 3); // N*64 - - static constexpr auto VerticalResolution480 = Bit(19); - static constexpr auto TexturePageY256 = Bit(4); - }; - - __declare_io_port_global(Command::GP0, GP0, 0x1F801810); - __declare_io_port_global(Command::GP1, GP1, 0x1F801814); - - __declare_io_port_global_const(uint32_t, GPUREAD, 0x1F801810); - __declare_io_port_global_const(GPUStatusRegister, GPUSTAT, 0x1F801814); } + + struct __no_align GPUStatusRegister : public ComplexBitMap { + static constexpr auto DrawingOddLinesInterlaced = Bit(31); + static constexpr auto DMADirectionValue = BitRange::from_to(29, 30); + static constexpr auto DMAReady = Bit(28); + static constexpr auto VRAMtoCPUtransferReay = Bit(27); + static constexpr auto GP0ReadyForCMD = Bit(26); + static constexpr auto FifoNotFull = Bit(25); // Only for Fifo + static constexpr auto InterruptRequest = Bit(24); + static constexpr auto DisplayDisabled = Bit(23); + static constexpr auto VerticalInterlaceOn = Bit(22); + static constexpr auto DisplayAreaColorDepth24bit = Bit(21); + static constexpr auto VideoModePal = Bit(20); + static constexpr auto VerticalResolutionValue = BitRange::from_to(19, 19); + static constexpr auto HorizontalResolutionValue = BitRange::from_to(17, 18); + static constexpr auto HorizontalResolution368 = Bit(16); + static constexpr auto TexturesDisabled = Bit(15); + static constexpr auto NotDrawingMaskedPixels = Bit(12); + static constexpr auto MaskBitSetDuringDrawEnabled = Bit(11); + static constexpr auto DrawingToDisplayAreadAllowed = Bit(10); + static constexpr auto DitherEnabled = Bit(9); + static constexpr auto TexturePageColorValue = BitRange::from_to(7, 8); + static constexpr auto SemiTransparencyValue = BitRange::from_to(5, 6); + static constexpr auto TexturePageY = BitRange::from_to(4, 4); // N*256 + static constexpr auto TexturePageX = BitRange::from_to(0, 3); // N*64 + + static constexpr auto VerticalResolution480 = Bit(19); + static constexpr auto TexturePageY256 = Bit(4); + }; + + __declare_io_port_global(Command::GP0, GP0, 0x1F801810); + __declare_io_port_global(Command::GP1, GP1, 0x1F801814); + + __declare_io_port_global_const(uint32_t, GPUREAD, 0x1F801810); + __declare_io_port_global_const(GPUStatusRegister, GPUSTAT, 0x1F801814); } #endif //!__JABYENGINE_GPU_IO_HPP__ \ No newline at end of file diff --git a/include/PSX/System/IOPorts/SPU_IO.hpp b/include/PSX/System/IOPorts/SPU_IO.hpp index 23994843..13cd5815 100644 --- a/include/PSX/System/IOPorts/SPU_IO.hpp +++ b/include/PSX/System/IOPorts/SPU_IO.hpp @@ -3,169 +3,167 @@ #include "IOPort.hpp" namespace SPU { - namespace Port { - enum struct Mode { - Linear = 0, - Exponential = 1, - }; + enum struct Mode { + Linear = 0, + Exponential = 1, + }; - enum struct Direction { - Increase = 0, - Decrease = 1, - }; + enum struct Direction { + Increase = 0, + Decrease = 1, + }; - enum struct Phase { - Posititve = 0, - Negative = 1, - }; + enum struct Phase { + Posititve = 0, + Negative = 1, + }; - //0..0x1F = Fast..Slow - typedef uint8_t Shift; + //0..0x1F = Fast..Slow + typedef uint8_t Shift; - //0..3 = +7, +6, +5, +4 or -6, -7, -6, -5 - typedef uint8_t Step; + //0..3 = +7, +6, +5, +4 or -6, -7, -6, -5 + typedef uint8_t Step; - typedef int16_t SimpleVolume; + typedef int16_t SimpleVolume; - struct __no_align SampleRate : public ComplexBitMap { - __io_port_inherit_complex_bit_map(SampleRate); + struct __no_align SampleRate : public ComplexBitMap { + __io_port_inherit_complex_bit_map(SampleRate); - static constexpr SampleRate from_HZ(double freq) { - //4096 == 44100Hz - constexpr double Base = (4096.0 / 44100.0); + static constexpr SampleRate from_HZ(double freq) { + //4096 == 44100Hz + constexpr double Base = (4096.0 / 44100.0); - return ComplexBitMap{static_cast((freq*Base))}; - } - }; - - struct __no_align SweepVolume : public ComplexBitMap { - __io_port_inherit_complex_bit_map(SweepVolume); - - // For Volume Mode - static constexpr auto SweepEnable = Bit(15); - static constexpr auto VolumeEnable = !SweepEnable; - static constexpr auto Volume = BitRange::from_to(0, 14); - - // For Sweep Mode - static constexpr auto SweepMode = Bit(14); - static constexpr auto SweepDirection = Bit(13); - static constexpr auto SweepPhase = Bit(12); - static constexpr auto SweepShift = BitRange::from_to(2, 6); - static constexpr auto SweepStep = BitRange::from_to(0, 1); - }; - - struct __no_align SR : public ComplexBitMap { - __io_port_inherit_complex_bit_map(SR); - - static constexpr auto SustainMode = Bit(31 - 16); - static constexpr auto SustainDirection = Bit(30 - 16); - static constexpr auto SustainShift = BitRange::from_to((24 - 16), (28 - 16)); - static constexpr auto SustainStep = BitRange::from_to((22 - 16), (23 - 16)); - static constexpr auto ReleaseMode = Bit(21 - 16); - static constexpr auto ReleaseShift = BitRange::from_to((16 - 16), (20 - 16)); - }; - - struct __no_align AD : public ComplexBitMap { - __io_port_inherit_complex_bit_map(AD); - - static constexpr auto AttackMode = Bit(15); - static constexpr auto AttackShift = BitRange::from_to(10, 14); - static constexpr auto AttackStep = BitRange::from_to(8, 9); - static constexpr auto DecayShift = BitRange::from_to(4, 7); - static constexpr auto SustainLevel = BitRange::from_to(0, 3); - }; - - struct __no_align Voice { - IOPort volumeLeft; //Offset: 0x0 - IOPort volumeRight; //Offset: 0x2 - IOPort sampleRate; //Offset: 0x4; - IOPort adr; //Offset: 0x6 - IOPort ad; //Offset: 0x8 - IOPort sr; //Offset: 0xA - IOPort currentVolume; //Offset: 0xC - IOPort repeatAdr; //Offset: 0xE - }; - - struct __no_align ControlRegister : public ComplexBitMap { - __io_port_inherit_complex_bit_map(ControlRegister); - - enum RAMTransferMode { - Stop = 0, - ManualWrite = 1, - DMAWrite = 2, - DMARead = 3 - }; - - static constexpr auto Enable = Bit(15); - static constexpr auto Unmute = Bit(14); - static constexpr auto NoiseFrequcenyShift = BitRange::from_to(10, 13); - static constexpr auto NoiseFrequcenyStep = BitRange::from_to(8, 9); - static constexpr auto ReverbMasterEnable = Bit(7); - static constexpr auto IRQ9Enable = Bit(6); - static constexpr auto TransferMode = BitRange::from_to(4, 5); - static constexpr auto ExternalAudioReverb = Bit(3); - static constexpr auto CDAudioReverb = Bit(2); - static constexpr auto ExternalAudioEnable = Bit(1); - static constexpr auto CDAudioEnable = Bit(0); - }; - - struct __no_align PitchModFlags : public ComplexBitMap { - __io_port_inherit_complex_bit_map(PitchModFlags); - - static constexpr BitRange EnableBits = BitRange::from_to(1, 23); - }; - - struct __no_align NoiseGenerator : public ComplexBitMap { - __io_port_inherit_complex_bit_map(NoiseGenerator); - - static constexpr BitRange NoiseBits = BitRange::from_to(0, 23); - }; - - struct __no_align EchoOn : public ComplexBitMap { - __io_port_inherit_complex_bit_map(EchoOn); - - static constexpr BitRange EchoBits = BitRange::from_to(0, 23); - }; - - static constexpr size_t VoiceCount = 24; - - namespace Key { - __declare_io_port_global(ubus32_t, on, 0x1F801D88); - __declare_io_port_global(ubus32_t, off, 0x1F801D8C); - __declare_io_port_global(ubus32_t, status, 0x1F801D9C); + return ComplexBitMap{static_cast((freq*Base))}; } + }; - namespace MainVolume { - __declare_io_port_global(SweepVolume, left, 0x1F801D80); - __declare_io_port_global(SweepVolume, right, 0x1F801D82); - } + struct __no_align SweepVolume : public ComplexBitMap { + __io_port_inherit_complex_bit_map(SweepVolume); - namespace CDVolume { - __declare_io_port_global(SimpleVolume, left, 0x1F801DB0); - __declare_io_port_global(SimpleVolume, right, 0x1F801DB2); - } + // For Volume Mode + static constexpr auto SweepEnable = Bit(15); + static constexpr auto VolumeEnable = !SweepEnable; + static constexpr auto Volume = BitRange::from_to(0, 14); - namespace ExternalAudioInputVolume { - __declare_io_port_global(SimpleVolume, left, 0x1F801DB4); - __declare_io_port_global(SimpleVolume, right, 0x1F801DB6); - } + // For Sweep Mode + static constexpr auto SweepMode = Bit(14); + static constexpr auto SweepDirection = Bit(13); + static constexpr auto SweepPhase = Bit(12); + static constexpr auto SweepShift = BitRange::from_to(2, 6); + static constexpr auto SweepStep = BitRange::from_to(0, 1); + }; - namespace Reverb { - namespace Volume { - __declare_io_port_global(SimpleVolume, left, 0x1F801D84); - __declare_io_port_global(SimpleVolume, right, 0x1F801D86); - } - __declare_io_port_global(uint16_t, work_area_adr, 0x1F801DA2); - } - - __declare_io_port_global(ControlRegister, Control, 0x1F801DAA); - __declare_io_port_global(uint16_t, DataTransferControl, 0x1F801DAC); - __declare_io_port_global(PitchModFlags, PMON, 0x1F801D90); - __declare_io_port_global(NoiseGenerator, NON, 0x1F801D94); - __declare_io_port_global(EchoOn, EON, 0x1F801D98); + struct __no_align SR : public ComplexBitMap { + __io_port_inherit_complex_bit_map(SR); - __declare_io_port_global_array(Voice, Voices, 0x1F801C00, VoiceCount); + static constexpr auto SustainMode = Bit(31 - 16); + static constexpr auto SustainDirection = Bit(30 - 16); + static constexpr auto SustainShift = BitRange::from_to((24 - 16), (28 - 16)); + static constexpr auto SustainStep = BitRange::from_to((22 - 16), (23 - 16)); + static constexpr auto ReleaseMode = Bit(21 - 16); + static constexpr auto ReleaseShift = BitRange::from_to((16 - 16), (20 - 16)); + }; + + struct __no_align AD : public ComplexBitMap { + __io_port_inherit_complex_bit_map(AD); + + static constexpr auto AttackMode = Bit(15); + static constexpr auto AttackShift = BitRange::from_to(10, 14); + static constexpr auto AttackStep = BitRange::from_to(8, 9); + static constexpr auto DecayShift = BitRange::from_to(4, 7); + static constexpr auto SustainLevel = BitRange::from_to(0, 3); + }; + + struct __no_align Voice { + IOPort volumeLeft; //Offset: 0x0 + IOPort volumeRight; //Offset: 0x2 + IOPort sampleRate; //Offset: 0x4; + IOPort adr; //Offset: 0x6 + IOPort ad; //Offset: 0x8 + IOPort sr; //Offset: 0xA + IOPort currentVolume; //Offset: 0xC + IOPort repeatAdr; //Offset: 0xE + }; + + struct __no_align ControlRegister : public ComplexBitMap { + __io_port_inherit_complex_bit_map(ControlRegister); + + enum RAMTransferMode { + Stop = 0, + ManualWrite = 1, + DMAWrite = 2, + DMARead = 3 + }; + + static constexpr auto Enable = Bit(15); + static constexpr auto Unmute = Bit(14); + static constexpr auto NoiseFrequcenyShift = BitRange::from_to(10, 13); + static constexpr auto NoiseFrequcenyStep = BitRange::from_to(8, 9); + static constexpr auto ReverbMasterEnable = Bit(7); + static constexpr auto IRQ9Enable = Bit(6); + static constexpr auto TransferMode = BitRange::from_to(4, 5); + static constexpr auto ExternalAudioReverb = Bit(3); + static constexpr auto CDAudioReverb = Bit(2); + static constexpr auto ExternalAudioEnable = Bit(1); + static constexpr auto CDAudioEnable = Bit(0); + }; + + struct __no_align PitchModFlags : public ComplexBitMap { + __io_port_inherit_complex_bit_map(PitchModFlags); + + static constexpr BitRange EnableBits = BitRange::from_to(1, 23); + }; + + struct __no_align NoiseGenerator : public ComplexBitMap { + __io_port_inherit_complex_bit_map(NoiseGenerator); + + static constexpr BitRange NoiseBits = BitRange::from_to(0, 23); + }; + + struct __no_align EchoOn : public ComplexBitMap { + __io_port_inherit_complex_bit_map(EchoOn); + + static constexpr BitRange EchoBits = BitRange::from_to(0, 23); + }; + + static constexpr size_t VoiceCount = 24; + + namespace Key { + __declare_io_port_global(ubus32_t, on, 0x1F801D88); + __declare_io_port_global(ubus32_t, off, 0x1F801D8C); + __declare_io_port_global(ubus32_t, status, 0x1F801D9C); } + + namespace MainVolume { + __declare_io_port_global(SweepVolume, left, 0x1F801D80); + __declare_io_port_global(SweepVolume, right, 0x1F801D82); + } + + namespace CDVolume { + __declare_io_port_global(SimpleVolume, left, 0x1F801DB0); + __declare_io_port_global(SimpleVolume, right, 0x1F801DB2); + } + + namespace ExternalAudioInputVolume { + __declare_io_port_global(SimpleVolume, left, 0x1F801DB4); + __declare_io_port_global(SimpleVolume, right, 0x1F801DB6); + } + + namespace Reverb { + namespace Volume { + __declare_io_port_global(SimpleVolume, left, 0x1F801D84); + __declare_io_port_global(SimpleVolume, right, 0x1F801D86); + } + __declare_io_port_global(uint16_t, work_area_adr, 0x1F801DA2); + } + + __declare_io_port_global(ControlRegister, Control, 0x1F801DAA); + __declare_io_port_global(uint16_t, DataTransferControl, 0x1F801DAC); + __declare_io_port_global(PitchModFlags, PMON, 0x1F801D90); + __declare_io_port_global(NoiseGenerator, NON, 0x1F801D94); + __declare_io_port_global(EchoOn, EON, 0x1F801D98); + + __declare_io_port_global_array(Voice, Voices, 0x1F801C00, VoiceCount); } #endif //!__JABYENGINE_SPU_IO_HPP__ \ No newline at end of file diff --git a/src/Library/include/GPU/GPU.h b/src/Library/include/GPU/GPU.h index aef04f50..b896640e 100644 --- a/src/Library/include/GPU/GPU.h +++ b/src/Library/include/GPU/GPU.h @@ -6,22 +6,22 @@ namespace GPU { static void quick_fill_fast(const Color24& color, const PositionU16& pos, const SizeU16& size) { - Port::GP0.write(Port::Command::GP0::QuickFill(color)); - Port::GP0.write(Port::Command::GP0::TopLeftPosition(pos.x, pos.y)); - Port::GP0.write(Port::Command::GP0::WidthHeight(size.width, size.height)); + GP0.write(Command::GP0::QuickFill(color)); + GP0.write(Command::GP0::TopLeftPosition(pos.x, pos.y)); + GP0.write(Command::GP0::WidthHeight(size.width, size.height)); } static void reset_cmd_buffer() { - Port::GP1.write(Port::Command::GP1::ResetCMDBufer()); + GP1.write(Command::GP1::ResetCMDBufer()); } static void wait_ready_for_CMD() { - while(!Port::GPUSTAT.ref().is(Port::GPUStatusRegister::GP0ReadyForCMD)); + while(!GPUSTAT.ref().is(GPUStatusRegister::GP0ReadyForCMD)); } namespace DMA { static void wait() { - while(::DMA::Port::GPU.channel_ctrl.ref().is(::DMA::Port::CHCHR::Busy)); + while(::DMA::GPU.channel_ctrl.ref().is(::DMA::CHCHR::Busy)); } static void end() { @@ -31,27 +31,27 @@ namespace GPU { namespace Receive { static void prepare() { - Port::GP1.write(Port::Command::GP1::DMADirection(Port::DMADirection::CPU2GPU)); + GP1.write(Command::GP1::DMADirection(DMADirection::CPU2GPU)); reset_cmd_buffer(); } static void set_src(uintptr_t adr) { - ::DMA::Port::GPU.adr.ref().set_value(static_cast(adr), ::DMA::Port::MADR::MemoryAdr); + ::DMA::GPU.adr.ref().set_value(static_cast(adr), ::DMA::MADR::MemoryAdr); } static void set_dst(const PositionU16& position, const SizeU16& size) { wait_ready_for_CMD(); - Port::GP0.write(Port::Command::GP0::CPU2VRAM_Blitting()); - Port::GP0.write(Port::Command::GP0::TopLeftPosition(position.x, position.y)); - Port::GP0.write(Port::Command::GP0::WidthHeight(size.width, size.height)); + GP0.write(Command::GP0::CPU2VRAM_Blitting()); + GP0.write(Command::GP0::TopLeftPosition(position.x, position.y)); + GP0.write(Command::GP0::WidthHeight(size.width, size.height)); } static void start(uint16_t blockCount, uint16_t wordsPerBlock = 0x10) { - typedef ::DMA::Port::BCR::SyncMode1 SyncMode1; + typedef ::DMA::BCR::SyncMode1 SyncMode1; - ::DMA::Port::GPU.block_ctrl.write(SyncMode1::with(SyncMode1::BlockSize.with(wordsPerBlock), SyncMode1::BlockAmount.with(blockCount))); - ::DMA::Port::GPU.channel_ctrl.write(::DMA::Port::CHCHR::StartGPUReceive()); + ::DMA::GPU.block_ctrl.write(SyncMode1::with(SyncMode1::BlockSize.with(wordsPerBlock), SyncMode1::BlockAmount.with(blockCount))); + ::DMA::GPU.channel_ctrl.write(::DMA::CHCHR::StartGPUReceive()); } } } diff --git a/src/Library/src/BootLoader/gpu_boot.cpp b/src/Library/src/BootLoader/gpu_boot.cpp index 742b27c6..99bc34b7 100644 --- a/src/Library/src/BootLoader/gpu_boot.cpp +++ b/src/Library/src/BootLoader/gpu_boot.cpp @@ -36,7 +36,7 @@ namespace GPU { } void setup() { - Port::GP1.write(Port::Command::GP1::Reset()); + GP1.write(Command::GP1::Reset()); quick_fill_fast(Color24::Black(), PositionU16(0, 0), SizeU16(640, 480)); } diff --git a/src/Library/src/BootLoader/spu_boot.cpp b/src/Library/src/BootLoader/spu_boot.cpp index fc7772ac..30035371 100644 --- a/src/Library/src/BootLoader/spu_boot.cpp +++ b/src/Library/src/BootLoader/spu_boot.cpp @@ -1,12 +1,8 @@ #include -#include #include #include namespace SPU { - using namespace Port; - using namespace DMA::Port; - static void clear_main_volume() { static constexpr auto StartVol = SweepVolume::with(SweepVolume::VolumeEnable, SweepVolume::Volume.with(I16_MAX >> 2)); diff --git a/src/Library/src/BootLoader/start_boot.cpp b/src/Library/src/BootLoader/start_boot.cpp index cd5a2d21..7c60c2c4 100644 --- a/src/Library/src/BootLoader/start_boot.cpp +++ b/src/Library/src/BootLoader/start_boot.cpp @@ -2,11 +2,9 @@ #include #include -using namespace DMA::Port; - namespace JabyEngine { static void enable_DMA() { - DPCR.write(DPCR.read() | DMAControlRegister::SPUEnable | DMAControlRegister::GPUEnable); + DMA::DPCR.write(DMA::DPCR.read() | DMA::DMAControlRegister::SPUEnable | DMA::DMAControlRegister::GPUEnable); } void start() { @@ -15,7 +13,6 @@ namespace JabyEngine { SPU::stop_voices(); GPU::display_logo(); - //Load picture here //Pause?? //Do not setup GPU for now