diff --git a/include/PSX/GPU/Primitives/primitive_gpu_commands.hpp b/include/PSX/GPU/Primitives/primitive_gpu_commands.hpp index 95af6a99..c1301b1a 100644 --- a/include/PSX/GPU/Primitives/primitive_gpu_commands.hpp +++ b/include/PSX/GPU/Primitives/primitive_gpu_commands.hpp @@ -9,7 +9,7 @@ namespace JabyEngine { struct TexPage : public internal::LinkedElementCreator { static constexpr bool is_render_primitive = true; - GPU_IO::GP0_t value; + struct GPU_IO::GP0 value; constexpr TexPage() = default; constexpr TexPage(const PositionU16& tex_pos, TexturePageColor tex_color, SemiTransparency transparency = SemiTransparency::B_Half_add_F_Half, bool dither = false) : value{ diff --git a/include/PSX/GPU/gpu.hpp b/include/PSX/GPU/gpu.hpp index 0381425c..3299b53f 100644 --- a/include/PSX/GPU/gpu.hpp +++ b/include/PSX/GPU/gpu.hpp @@ -28,11 +28,11 @@ namespace JabyEngine { static uint8_t current_id; static void enable() { - GPU_IO::GP1 = GPU_IO::Command::SetDisplayState(GPU_IO::DisplayState::On); + GPU_IO::GP1.write(GPU_IO::Command::SetDisplayState(GPU_IO::DisplayState::On)); } static void disable() { - GPU_IO::GP1 = GPU_IO::Command::SetDisplayState(GPU_IO::DisplayState::Off); + GPU_IO::GP1.write(GPU_IO::Command::SetDisplayState(GPU_IO::DisplayState::Off)); } static void set_offset(uint16_t x, uint16_t y); diff --git a/include/PSX/System/IOPorts/dma_io.hpp b/include/PSX/System/IOPorts/dma_io.hpp index 4c016add..ded1ca59 100644 --- a/include/PSX/System/IOPorts/dma_io.hpp +++ b/include/PSX/System/IOPorts/dma_io.hpp @@ -140,16 +140,16 @@ namespace JabyEngine { static constexpr auto ForceIRQ = Bit(15); }; - __new_declare_value_at(Registers, MDECin, 0x1F801080); - __new_declare_value_at(Registers, MDECout, 0x1F801090); - __new_declare_value_at(Registers, GPU, 0x1F8010A0); - __new_declare_value_at(Registers, CDROM, 0x1F8010B0); - __new_declare_value_at(Registers, SPU, 0x1F8010C0); - __new_declare_value_at(Registers, PIO, 0x1F8010D0); - __new_declare_value_at(Registers, OTC, 0x1F8010E0); + __new_declare_value_at(, Registers, MDECin, 0x1F801080); + __new_declare_value_at(, Registers, MDECout, 0x1F801090); + __new_declare_value_at(, Registers, GPU, 0x1F8010A0); + __new_declare_value_at(, Registers, CDROM, 0x1F8010B0); + __new_declare_value_at(, Registers, SPU, 0x1F8010C0); + __new_declare_value_at(, Registers, PIO, 0x1F8010D0); + __new_declare_value_at(, Registers, OTC, 0x1F8010E0); - __new_declare_io_port(DPCR, 0x1F8010F0); - __new_declare_io_port(DICR, 0x1F8010F4); + __new_declare_io_port(, DPCR, 0x1F8010F0); + __new_declare_io_port(, DICR, 0x1F8010F4); } } #endif //!__JABYENGINE_DMA_IO_HPP__ \ No newline at end of file diff --git a/include/PSX/System/IOPorts/gpu_io.hpp b/include/PSX/System/IOPorts/gpu_io.hpp index c916fafa..728ac44e 100644 --- a/include/PSX/System/IOPorts/gpu_io.hpp +++ b/include/PSX/System/IOPorts/gpu_io.hpp @@ -35,7 +35,7 @@ namespace JabyEngine { Off = 1 }; - __declare_io_type(DisplayMode, uint32_t, + __new_declare_io_value(DisplayMode, uint32_t) { enum struct TVEncoding { NTSC = 0, PAL = 1, @@ -48,8 +48,8 @@ namespace JabyEngine { static constexpr auto VerticalResolution = BitRange::from_to(2, 2); static constexpr auto HorizontalResolution = BitRange::from_to(0, 1); - static constexpr Self PAL() { - return Self::from( + static constexpr DisplayMode PAL() { + return DisplayMode::from( HorizontalResolution.with(GPU_IO::HorizontalResolution::$320), VerticalResolution.with(GPU_IO::VerticalResolution::$240), VideoMode.with(TVEncoding::PAL), @@ -57,51 +57,55 @@ namespace JabyEngine { ); } - static constexpr Self NTSC() { - return Self::from( + static constexpr DisplayMode NTSC() { + return DisplayMode::from( HorizontalResolution.with(GPU_IO::HorizontalResolution::$320), VerticalResolution.with(GPU_IO::VerticalResolution::$240), VideoMode.with(TVEncoding::NTSC), DisplayAreaColorDepth.with(GPU_IO::DisplayAreaColorDepth::$15bit) ); } - ); + }; - __declare_io_type(GP0, uint32_t, - ); - - __declare_io_type(GP1, uint32_t, - ); + __new_declare_io_value(GP0, uint32_t) { + static constexpr auto ID = BitRange::from_to(24, 31); + static constexpr auto Value = BitRange::from_to(0, 23); + }; + __new_declare_io_value(GP1, uint32_t) { + static constexpr auto ID = BitRange::from_to(24, 31); + static constexpr auto Value = BitRange::from_to(0, 23); + }; struct Command { struct Helper { - static constexpr uint32_t construct_cmd(uint8_t cmd, uint32_t value) { - return ((cmd << 24) | value); + template + static constexpr T construct_cmd(uint32_t cmd, uint32_t value) { + return T::from(T::ID.with(cmd), T::Value.with(value)); } - static constexpr GP0_t DrawAreaTemplate(uint8_t code, uint16_t x, uint16_t y) { + static constexpr struct GP0 DrawAreaTemplate(uint8_t code, uint16_t x, uint16_t y) { constexpr auto Command = BitRange::from_to(24, 31); constexpr auto Y = BitRange::from_to(10, 18); constexpr auto X = BitRange::from_to(0, 9); - return {construct_cmd(code, Y.as_value(static_cast(y)) | X.as_value(static_cast(x)))}; + return construct_cmd(code, Y.as_value(static_cast(y)) | X.as_value(static_cast(x))); } }; - static constexpr GP0_t QuickFill(GPU::Color24 color) { - return {(0x02 << 24) | color.raw()}; + static constexpr struct GP0 QuickFill(GPU::Color24 color) { + return Helper::construct_cmd(0x02, color.raw()); } - static constexpr GP0_t VRAM2VRAM_Blitting() { - return {(0b100u << 29)}; + static constexpr struct GP0 VRAM2VRAM_Blitting() { + return Helper::construct_cmd(0x80, 0); } - static constexpr GP0_t CPU2VRAM_Blitting() { - return {(0b101u << 29)}; + static constexpr struct GP0 CPU2VRAM_Blitting() { + return Helper::construct_cmd(0xA0, 0); } - static constexpr GP0_t TexPage(const GPU::PositionU16& page_pos, GPU::SemiTransparency transparency, GPU::TexturePageColor tex_color, bool dither, bool draw_on_display_area) { + static constexpr struct GP0 TexPage(const GPU::PositionU16& page_pos, GPU::SemiTransparency transparency, GPU::TexturePageColor tex_color, bool dither, bool draw_on_display_area) { constexpr auto TexXRange = BitRange::from_to(0, 3); constexpr auto TexYRange = BitRange::from_to(4, 4); constexpr auto TransparencyRange = BitRange::from_to(5, 6); @@ -109,79 +113,79 @@ namespace JabyEngine { constexpr auto DitherBit = BitRange::from_to(9, 9); constexpr auto DrawOnDisplayAreaBit = BitRange::from_to(10, 10); - return {Helper::construct_cmd(0xE1, + return Helper::construct_cmd(0xE1, TexXRange.as_value(page_pos.x >> 6) | TexYRange.as_value(page_pos.y >> 7) | TransparencyRange.as_value(static_cast(transparency)) | TextureColorRange.as_value(static_cast(tex_color)) | DitherBit.as_value(static_cast(dither)) | DrawOnDisplayAreaBit.as_value(static_cast(draw_on_display_area)) - )}; + ); } - static constexpr GP0_t DrawAreaTopLeft(const GPU::PositionU16& position) { + static constexpr struct GP0 DrawAreaTopLeft(const GPU::PositionU16& position) { return Helper::DrawAreaTemplate(0xE3, position.x, position.y); } - static constexpr GP0_t DrawAreaBottomRight(const GPU::PositionU16& position) { + static constexpr struct GP0 DrawAreaBottomRight(const GPU::PositionU16& position) { return Helper::DrawAreaTemplate(0xE4, position.x, position.y); } - static constexpr GP0_t SetDrawOffset(const GPU::PositionI16& offset) { + static constexpr struct GP0 SetDrawOffset(const GPU::PositionI16& offset) { constexpr auto X = BitRange::from_to(0, 10); constexpr auto Y = BitRange::from_to(11, 21); - return {Helper::construct_cmd(0xE5, X.as_value(static_cast(offset.x)) | Y.as_value(static_cast(offset.y)))}; + return Helper::construct_cmd(0xE5, X.as_value(static_cast(offset.x)) | Y.as_value(static_cast(offset.y))); } - static constexpr GP0_t TopLeftPosition(const GPU::PositionU16& position) { + static constexpr struct GP0 TopLeftPosition(const GPU::PositionU16& position) { return {(static_cast(position.y) << 16u) | position.x}; } - static constexpr GP0_t WidthHeight(const GPU::SizeU16& size) { + static constexpr struct GP0 WidthHeight(const GPU::SizeU16& size) { return {(static_cast(size.height) << 16u) | size.width}; } - static constexpr GP1_t Reset() { + static constexpr struct GP1 Reset() { return {0}; } - static constexpr GP1_t ResetCMDBufer() { - return {Helper::construct_cmd(0x01, 0)}; + static constexpr struct GP1 ResetCMDBufer() { + return Helper::construct_cmd(0x01, 0); } - static constexpr GP1_t SetDisplayState(DisplayState state) { - return {Helper::construct_cmd(0x03, static_cast(state))}; + static constexpr struct GP1 SetDisplayState(DisplayState state) { + return Helper::construct_cmd(0x03, static_cast(state)); } - static constexpr GP1_t DMADirection(DMADirection dir) { - return {Helper::construct_cmd(0x04, static_cast(dir))}; + static constexpr struct GP1 DMADirection(DMADirection dir) { + return Helper::construct_cmd(0x04, static_cast(dir)); } - static constexpr GP1_t DisplayArea(const GPU::PositionU16& position) { + static constexpr struct GP1 DisplayArea(const GPU::PositionU16& position) { constexpr auto X = BitRange::from_to(0, 9); constexpr auto Y = BitRange::from_to(10, 18); - return {Helper::construct_cmd(0x05, X.as_value(static_cast(position.x)) | Y.as_value(static_cast(position.y)))}; + return Helper::construct_cmd(0x05, X.as_value(static_cast(position.x)) | Y.as_value(static_cast(position.y))); } - static constexpr GP1_t HorizontalDisplayRange(uint16_t x1, uint16_t x2) { + static constexpr struct GP1 HorizontalDisplayRange(uint16_t x1, uint16_t x2) { constexpr auto X1 = BitRange::from_to(0, 11); constexpr auto X2 = BitRange::from_to(12, 23); - return {Helper::construct_cmd(0x06, X1.as_value(static_cast(x1)) | X2.as_value(static_cast(x2)))}; + return Helper::construct_cmd(0x06, X1.as_value(static_cast(x1)) | X2.as_value(static_cast(x2))); } - static constexpr GP1_t VerticalDisplayRange(uint16_t y1, uint16_t y2) { + static constexpr struct GP1 VerticalDisplayRange(uint16_t y1, uint16_t y2) { constexpr auto Y1 = BitRange::from_to(0, 9); constexpr auto Y2 = BitRange::from_to(10, 19); - return {Helper::construct_cmd(0x07, Y1.as_value(static_cast(y1)) | Y2.as_value(static_cast(y2)))}; + return Helper::construct_cmd(0x07, Y1.as_value(static_cast(y1)) | Y2.as_value(static_cast(y2))); } - static constexpr GP1_t DisplayMode(DisplayMode_t mode) { - return {Helper::construct_cmd(0x08, mode)}; + static constexpr struct GP1 DisplayMode(DisplayMode mode) { + return Helper::construct_cmd(0x08, mode.raw); } }; - __declare_io_type(GPUSTAT, uint32_t, + __new_declare_io_value(GPUSTAT, uint32_t) { static constexpr auto DrawingOddLinesInterlaced = Bit(31); static constexpr auto DMADirectionValue = BitRange::from_to(29, 30); static constexpr auto DMAReady = Bit(28); @@ -208,15 +212,13 @@ namespace JabyEngine { static constexpr auto VerticalResolution480 = Bit(19); static constexpr auto TexturePageY256 = Bit(4); - ); + }; - typedef volatile uint32_t GPUREAD_v; + __new_declare_io_port(, GP0, 0x1F801810); + __new_declare_io_port(, GP1, 0x1F801814); - __declare_new_io_port(GP0, 0x1F801810); - __declare_new_io_port(GP1, 0x1F801814); - - __declare_new_const_io_port(GPUREAD, 0x1F801810); - __declare_new_const_io_port(GPUSTAT, 0x1F801814); + __new_declare_io_port(const, GPUREAD, 0x1F801810); + __new_declare_io_port(const, GPUSTAT, 0x1F801814); } } #endif //!__JABYENGINE_GPU_IO_HPP__ \ No newline at end of file diff --git a/include/PSX/System/IOPorts/ioport.hpp b/include/PSX/System/IOPorts/ioport.hpp index 3ad0cf86..c2a3bcbf 100644 --- a/include/PSX/System/IOPorts/ioport.hpp +++ b/include/PSX/System/IOPorts/ioport.hpp @@ -119,9 +119,9 @@ namespace JabyEngine { }; #define __new_declare_io_value(name, type) struct name : public ::JabyEngine::New::internal::IOValue - #define __new_declare_value_at(type, name, adr) static auto& name = *reinterpret_cast(IOAdress::patch_adr(adr)) - #define __new_declare_io_port_w_type(type, name, adr) __new_declare_value_at(::JabyEngine::New::IOPort, name, adr) - #define __new_declare_io_port(name, adr) __new_declare_io_port_w_type(struct name, name, adr) + #define __new_declare_value_at(cv, type, name, adr) static cv auto& name = *reinterpret_cast(IOAdress::patch_adr(adr)) + #define __new_declare_io_port_w_type(cv, type, name, adr) __new_declare_value_at(cv, ::JabyEngine::New::IOPort, name, adr) + #define __new_declare_io_port(cv, name, adr) __new_declare_io_port_w_type(cv, struct name, name, adr) } namespace IOPort { diff --git a/include/PSX/System/IOPorts/memory_io.hpp b/include/PSX/System/IOPorts/memory_io.hpp index 36140196..7514f414 100644 --- a/include/PSX/System/IOPorts/memory_io.hpp +++ b/include/PSX/System/IOPorts/memory_io.hpp @@ -16,8 +16,8 @@ namespace JabyEngine { } }; - __new_declare_io_port(COM_DELAY, 0x1F801020); - __new_declare_io_port(CD_DELAY, 0x1F801018); + __new_declare_io_port(, COM_DELAY, 0x1F801020); + __new_declare_io_port(, CD_DELAY, 0x1F801018); } } diff --git a/src/Library/internal-include/GPU/gpu_internal.hpp b/src/Library/internal-include/GPU/gpu_internal.hpp index d29bee85..2ed1a027 100644 --- a/src/Library/internal-include/GPU/gpu_internal.hpp +++ b/src/Library/internal-include/GPU/gpu_internal.hpp @@ -14,10 +14,10 @@ namespace JabyEngine { static constexpr auto Height = PublicDisplay::Height; #ifdef JABYENGINE_PAL - static constexpr auto DisplayMode = GPU_IO::DisplayMode_t::PAL(); + static constexpr auto DisplayMode = GPU_IO::DisplayMode::PAL(); static constexpr uint16_t ScanlinesV = 288; #else - static constexpr auto DisplayMode = GPU_IO::DisplayMode_t::NTSC(); + static constexpr auto DisplayMode = GPU_IO::DisplayMode::NTSC(); static constexpr uint16_t ScanlinesV = 240; #endif //JABYENGINE_PAL @@ -27,7 +27,7 @@ namespace JabyEngine { void wait_vsync(uint8_t syncs); static void wait_ready_for_CMD() { - while(!GPU_IO::GPUSTAT.is_set(GPU_IO::GPUSTAT_t::GP0ReadyForCMD)); + while(!GPU_IO::GPUSTAT.read().is_set2(GPU_IO::GPUSTAT::GP0ReadyForCMD)); } static void set_draw_area(const PositionU16& pos) { @@ -35,33 +35,33 @@ namespace JabyEngine { const auto bottom_right = GPU_IO::Command::DrawAreaBottomRight(pos.move((Display::Width - 1), (Display::Height - 1))); wait_ready_for_CMD(); - GPU_IO::GP0 = top_left; + GPU_IO::GP0.write(top_left); wait_ready_for_CMD(); - GPU_IO::GP0 = bottom_right; + GPU_IO::GP0.write(bottom_right); } static void copy_vram_to_vram(const AreaU16& dst, const PositionU16& src) { wait_ready_for_CMD(); - GPU_IO::GP0 = GPU_IO::Command::VRAM2VRAM_Blitting(); - GPU_IO::GP0 = GPU_IO::Command::TopLeftPosition(src); - GPU_IO::GP0 = GPU_IO::Command::TopLeftPosition(dst.position); - GPU_IO::GP0 = GPU_IO::Command::WidthHeight(dst.size); + GPU_IO::GP0.write(GPU_IO::Command::VRAM2VRAM_Blitting()); + GPU_IO::GP0.write(GPU_IO::Command::TopLeftPosition(src)); + GPU_IO::GP0.write(GPU_IO::Command::TopLeftPosition(dst.position)); + GPU_IO::GP0.write(GPU_IO::Command::WidthHeight(dst.size)); } static void quick_fill_fast(const Color24& color, const AreaU16& area) { wait_ready_for_CMD(); - GPU_IO::GP0 = GPU_IO::Command::QuickFill(color); - GPU_IO::GP0 = GPU_IO::Command::TopLeftPosition(area.position); - GPU_IO::GP0 = GPU_IO::Command::WidthHeight(area.size); + GPU_IO::GP0.write(GPU_IO::Command::QuickFill(color)); + GPU_IO::GP0.write(GPU_IO::Command::TopLeftPosition(area.position)); + GPU_IO::GP0.write(GPU_IO::Command::WidthHeight(area.size)); } static void set_draw_offset(const PositionI16& offset) { wait_ready_for_CMD(); - GPU_IO::GP0 = GPU_IO::Command::SetDrawOffset(offset); + GPU_IO::GP0.write(GPU_IO::Command::SetDrawOffset(offset)); } static void reset_cmd_buffer() { - GPU_IO::GP1 = GPU_IO::Command::ResetCMDBufer(); + GPU_IO::GP1.write(GPU_IO::Command::ResetCMDBufer()); } namespace DMA { @@ -75,7 +75,7 @@ namespace JabyEngine { namespace Receive { static void prepare() { - GPU_IO::GP1 = GPU_IO::Command::DMADirection(GPU_IO::DMADirection::CPU2GPU); + GPU_IO::GP1.write(GPU_IO::Command::DMADirection(GPU_IO::DMADirection::CPU2GPU)); reset_cmd_buffer(); } @@ -85,9 +85,9 @@ namespace JabyEngine { static void set_dst(const PositionU16& position, const SizeU16& size) { wait_ready_for_CMD(); - GPU_IO::GP0 = GPU_IO::Command::CPU2VRAM_Blitting(); - GPU_IO::GP0 = GPU_IO::Command::TopLeftPosition(position); - GPU_IO::GP0 = GPU_IO::Command::WidthHeight(size); + GPU_IO::GP0.write(GPU_IO::Command::CPU2VRAM_Blitting()); + GPU_IO::GP0.write(GPU_IO::Command::TopLeftPosition(position)); + GPU_IO::GP0.write(GPU_IO::Command::WidthHeight(size)); } static void start(uint16_t blockCount, uint16_t wordsPerBlock = 0x10) { diff --git a/src/Library/src/BootLoader/gpu_boot.cpp b/src/Library/src/BootLoader/gpu_boot.cpp index 0af9922b..790fcacd 100644 --- a/src/Library/src/BootLoader/gpu_boot.cpp +++ b/src/Library/src/BootLoader/gpu_boot.cpp @@ -26,7 +26,7 @@ namespace JabyEngine { static void configurate_display() { // Ideal I hope that an offset of 0,0 will produce a well enough centered picture for every TV - GPU_IO::GP1 = GPU_IO::Command::DisplayMode(internal::Display::DisplayMode); + GPU_IO::GP1.write(GPU_IO::Command::DisplayMode(internal::Display::DisplayMode)); GPU::Display::set_offset(0, 0); } @@ -65,7 +65,7 @@ namespace JabyEngine { } void setup() { - GPU_IO::GP1 = GPU_IO::Command::Reset(); + GPU_IO::GP1.write(GPU_IO::Command::Reset()); configurate_display(); internal::Display::exchange_buffer_and_display(); diff --git a/src/Library/src/BootLoader/start_boot.cpp b/src/Library/src/BootLoader/start_boot.cpp index c086c7d1..57647406 100644 --- a/src/Library/src/BootLoader/start_boot.cpp +++ b/src/Library/src/BootLoader/start_boot.cpp @@ -15,7 +15,7 @@ namespace JabyEngine { namespace Blubb { __new_declare_io_value(Test, uint32_t) { }; - __new_declare_io_port(Test, 0); + __new_declare_io_port(, Test, 0); static void bla(New::IOPort& wuff) { asm("#planschi"); const auto a = Test::from(Bit(1), Bit(2)); diff --git a/src/Library/src/GPU/gpu.cpp b/src/Library/src/GPU/gpu.cpp index 897de61c..ef66f168 100644 --- a/src/Library/src/GPU/gpu.cpp +++ b/src/Library/src/GPU/gpu.cpp @@ -45,7 +45,7 @@ namespace JabyEngine { GPU::internal::set_draw_area({0, draw_area_y}); PublicDisplay::current_id ^= 1; - GPU_IO::GP1 = GPU_IO::Command::DisplayArea({0, static_cast((PublicDisplay::Height*PublicDisplay::current_id))}); + GPU_IO::GP1.write(GPU_IO::Command::DisplayArea({0, static_cast((PublicDisplay::Height*PublicDisplay::current_id))})); return draw_area_y; } @@ -59,14 +59,14 @@ namespace JabyEngine { void render(const uint32_t* data, size_t words) { wait_ready_for_CMD(); for(size_t n = 0; n < words; n++) { - GPU_IO::GP0 = data[n]; + GPU_IO::GP0.write({data[n]}); } } void render_dma(const uint32_t* data) { wait_ready_for_CMD(); // DPCR already enabled - GPU_IO::GP1 = GPU_IO::Command::DMADirection(GPU_IO::DMADirection::CPU2GPU); + GPU_IO::GP1.write(GPU_IO::Command::DMADirection(GPU_IO::DMADirection::CPU2GPU)); DMA_IO::GPU.set_adr(reinterpret_cast(data)); DMA_IO::GPU.block_ctrl.write(DMA_IO::BCR::SyncMode2::for_gpu_cmd()); DMA_IO::GPU.channel_ctrl.write(DMA_IO::CHCHR::StartGPULinked()); @@ -78,13 +78,13 @@ namespace JabyEngine { x += 78; y += 43; - GPU_IO::GP1 = GPU_IO::Command::HorizontalDisplayRange((x << 3), (x + Display::Width) << 3); - GPU_IO::GP1 = GPU_IO::Command::VerticalDisplayRange(y, y + Display::Height); + GPU_IO::GP1.write(GPU_IO::Command::HorizontalDisplayRange((x << 3), (x + Display::Width) << 3)); + GPU_IO::GP1.write(GPU_IO::Command::VerticalDisplayRange(y, y + Display::Height)); } #else void Display :: set_offset(uint16_t x, uint16_t y) { - GPU_IO::GP1 = GPU_IO::Command::HorizontalDisplayRange(x, (x + Display::Width*8)); - GPU_IO::GP1 = GPU_IO::Command::VerticalDisplayRange(y - (ScanlinesV/2), y + (ScanlinesV/2)); + GPU_IO::GP1.write(GPU_IO::Command::HorizontalDisplayRange(x, (x + Display::Width*8))); + GPU_IO::GP1.write(GPU_IO::Command::VerticalDisplayRange(y - (ScanlinesV/2), y + (ScanlinesV/2))); } #endif //USE_NO$PSX