#ifndef __JABYENGINE_GPU_IO_HPP__ #define __JABYENGINE_GPU_IO_HPP__ #include "ioport.hpp" #include "../../GPU/gpu_types.hpp" namespace GPU { enum struct SemiTransparency { B_Half_add_F_Half = 0, B_add_F = 1, B_sub_F = 2, B_add_F_Quarter = 3, }; enum struct DisplayAreaColorDepth { $15bit = 0, $24bit = 1, }; enum struct TexturePageColor { $4bit = 0, $8bit = 1, $15bit = 2, }; enum struct HorizontalResolution { $256 = 0, $320 = 1, $512 = 2, $640 = 3, }; enum struct VerticalResolution { $240 = 0, $480 = 1 }; enum struct DMADirection { Off = 0, Fifo = 1, CPU2GPU = 2, GPU2CPU = 3, }; enum struct DisplayState { On = 0, Off = 1 }; namespace Command { struct __no_align GP0 : public ComplexBitMap { __io_port_inherit_complex_bit_map(GP0); static constexpr GP0 QuickFill(Color24 color) { return ComplexBitMap{(0x02 << 24) | color.raw()}; } static constexpr GP0 CPU2VRAM_Blitting() { return ComplexBitMap{(0b101u << 29)}; } static constexpr GP0 DrawAreaTemplate(uint8_t code, uint16_t x, uint16_t y) { constexpr auto Command = BitRange::from_to(24, 31); constexpr auto Y = BitRange::from_to(10, 18); constexpr auto X = BitRange::from_to(0, 9); return ComplexBitMap::with(Command.with(code), Y.with(y), X.with(x)); } static constexpr GP0 DrawAreaTopLeft(uint16_t x, uint16_t y) { return DrawAreaTemplate(0xE3, x, y); } static constexpr GP0 DrawAreaBottomRight(uint16_t x, uint16_t y) { return DrawAreaTemplate(0xE4, x, y); } static constexpr GP0 TopLeftPosition(uint16_t x, uint16_t y) { return ComplexBitMap{static_cast((y << 16u) | x)}; } static constexpr GP0 WidthHeight(uint16_t w, uint16_t h) { return ComplexBitMap{static_cast((h << 16u) | w)}; } }; struct __no_align GP1 : public ComplexBitMap { __io_port_inherit_complex_bit_map(GP1); static constexpr uint32_t construct_cmd(uint8_t cmd, uint32_t value) { return ((cmd << 24) | value); } static constexpr GP1 Reset() { return ComplexBitMap{0}; } static constexpr GP1 ResetCMDBufer() { return ComplexBitMap{construct_cmd(0x01, 0)}; } static constexpr GP1 SetDisplayState(DisplayState state) { return ComplexBitMap{construct_cmd(0x03, static_cast(state))}; } static constexpr GP1 DMADirection(DMADirection dir) { return ComplexBitMap{construct_cmd(0x04, static_cast(dir))}; } static constexpr GP1 DisplayArea(uint16_t x, uint16_t y) { constexpr auto X = BitRange::from_to(0, 9); constexpr auto Y = BitRange::from_to(10, 18); return ComplexBitMap{construct_cmd(0x05, ComplexBitMap::with(X.with(x), Y.with(y)).raw)}; } static constexpr GP1 HorizontalDisplayRange(uint32_t x1, uint32_t x2) { constexpr auto X1 = BitRange::from_to(0, 11); constexpr auto X2 = BitRange::from_to(12, 23); return ComplexBitMap{construct_cmd(0x06, ComplexBitMap::with(X1.with(x1), X2.with(x2)).raw)}; } static constexpr GP1 VerticalDisplayRange(uint32_t y1, uint32_t y2) { constexpr auto Y1 = BitRange::from_to(0, 9); constexpr auto Y2 = BitRange::from_to(10, 19); return ComplexBitMap{construct_cmd(0x07, ComplexBitMap::with(Y1.with(y1), Y2.with(y2)).raw)}; } static constexpr GP1 DisplayMode(uint32_t mode) { return ComplexBitMap{construct_cmd(0x08, mode)}; } }; } struct __no_align GPUStatusRegister : public ComplexBitMap { static constexpr auto DrawingOddLinesInterlaced = Bit(31); static constexpr auto DMADirectionValue = BitRange::from_to(29, 30); static constexpr auto DMAReady = Bit(28); static constexpr auto VRAMtoCPUtransferReay = Bit(27); static constexpr auto GP0ReadyForCMD = Bit(26); static constexpr auto FifoNotFull = Bit(25); // Only for Fifo static constexpr auto InterruptRequest = Bit(24); static constexpr auto DisplayDisabled = Bit(23); static constexpr auto VerticalInterlaceOn = Bit(22); static constexpr auto DisplayAreaColorDepth = BitRange::from_to(21, 21); static constexpr auto VideoModePal = Bit(20); static constexpr auto VerticalResolutionValue = BitRange::from_to(19, 19); static constexpr auto HorizontalResolutionValue = BitRange::from_to(17, 18); static constexpr auto HorizontalResolution368 = Bit(16); static constexpr auto TexturesDisabled = Bit(15); static constexpr auto NotDrawingMaskedPixels = Bit(12); static constexpr auto MaskBitSetDuringDrawEnabled = Bit(11); static constexpr auto DrawingToDisplayAreadAllowed = Bit(10); static constexpr auto DitherEnabled = Bit(9); static constexpr auto TexturePageColorValue = BitRange::from_to(7, 8); static constexpr auto SemiTransparencyValue = BitRange::from_to(5, 6); static constexpr auto TexturePageY = BitRange::from_to(4, 4); // N*256 static constexpr auto TexturePageX = BitRange::from_to(0, 3); // N*64 static constexpr auto VerticalResolution480 = Bit(19); static constexpr auto TexturePageY256 = Bit(4); }; __declare_io_port_global(Command::GP0, GP0, 0x1F801810); __declare_io_port_global(Command::GP1, GP1, 0x1F801814); __declare_io_port_global_const(uint32_t, GPUREAD, 0x1F801810); __declare_io_port_global_const(GPUStatusRegister, GPUSTAT, 0x1F801814); } #endif //!__JABYENGINE_GPU_IO_HPP__