#ifndef __JABYENGINE_INTERNAL_GPU_HPP__ #define __JABYENGINE_INTERNAL_GPU_HPP__ #include #include #include namespace GPU { namespace Screen { struct Mode { enum struct TVEncoding { NTSC = 0, PAL = 1, }; static constexpr auto HorizontalResolution368 = Bit(6); static constexpr auto VerticalInterlace = Bit(5); static constexpr auto DisplayAreaColorDepth = BitRange::from_to(4, 4); static constexpr auto VideoMode = BitRange::from_to(3, 3); static constexpr auto VerticalResolution = BitRange::from_to(2, 2); static constexpr auto HorizontalResolution = BitRange::from_to(0, 1); static constexpr uint32_t PAL() { return ComplexBitMap::with( Mode::HorizontalResolution.with(GPU::HorizontalResolution::$320), Mode::VerticalResolution.with(GPU::VerticalResolution::$240), Mode::VideoMode.with(TVEncoding::PAL), Mode::DisplayAreaColorDepth.with(GPU::DisplayAreaColorDepth::$15bit) ).raw; } static constexpr uint32_t NTSC() { return ComplexBitMap::with( Mode::HorizontalResolution.with(GPU::HorizontalResolution::$320), Mode::VerticalResolution.with(GPU::VerticalResolution::$240), Mode::VideoMode.with(TVEncoding::NTSC), Mode::DisplayAreaColorDepth.with(GPU::DisplayAreaColorDepth::$15bit) ).raw; } }; static void configurate() { static constexpr uint16_t FirstVisiblePixelH = 0x260; #ifdef JABYENGINE_PAL static constexpr uint16_t FirstVisiblePixelV = 0xA3; GP1.write(Command::GP1::DisplayMode(Mode::PAL())); GPU::Screen::Range::set_offset(0, 0); #else static constexpr uint16_t FirstVisiblePixelV = 0x88; GP1.write(Command::GP1::DisplayMode(Mode::NTSC())); GPU::Screen::set_offset(0, 5); //< Random values #endif } void exchange_buffer_and_display(); } static void set_draw_area(uint16_t x, uint16_t y) { GP0.write(Command::GP0::DrawAreaTopLeft(x, y)); GP0.write(Command::GP0::DrawAreaBottomRight((x + Display::Width), (y + Display::Height))); } static void quick_fill_fast(const Color24& color, const PositionU16& pos, const SizeU16& size) { GP0.write(Command::GP0::QuickFill(color)); GP0.write(Command::GP0::TopLeftPosition(pos.x, pos.y)); GP0.write(Command::GP0::WidthHeight(size.width, size.height)); } static void reset_cmd_buffer() { GP1.write(Command::GP1::ResetCMDBufer()); } static void wait_ready_for_CMD() { while(!GPUSTAT.ref().is(GPUStatusRegister::GP0ReadyForCMD)); } namespace DMA { static void wait() { while(::DMA::GPU.channel_ctrl.ref().is(::DMA::CHCHR::Busy)); } static void end() { reset_cmd_buffer(); } namespace Receive { static void prepare() { GP1.write(Command::GP1::DMADirection(DMADirection::CPU2GPU)); reset_cmd_buffer(); } static void set_src(uintptr_t adr) { ::DMA::GPU.adr.ref().set_value(static_cast(adr), ::DMA::MADR::MemoryAdr); } static void set_dst(const PositionU16& position, const SizeU16& size) { wait_ready_for_CMD(); GP0.write(Command::GP0::CPU2VRAM_Blitting()); GP0.write(Command::GP0::TopLeftPosition(position.x, position.y)); GP0.write(Command::GP0::WidthHeight(size.width, size.height)); } static void start(uint16_t blockCount, uint16_t wordsPerBlock = 0x10) { typedef ::DMA::BCR::SyncMode1 SyncMode1; ::DMA::GPU.block_ctrl.write(SyncMode1::with(SyncMode1::BlockSize.with(wordsPerBlock), SyncMode1::BlockAmount.with(blockCount))); ::DMA::GPU.channel_ctrl.write(::DMA::CHCHR::StartGPUReceive()); } } } } #endif //!__JABYENGINE_INTERNAL_GPU_HPP__