#ifndef __JABYENGINE_GPU_INTERNAL_HPP__ #define __JABYENGINE_GPU_INTERNAL_HPP__ #include #include #include namespace JabyEngine { namespace GPU { namespace internal { struct Screen { struct Mode { enum struct TVEncoding { NTSC = 0, PAL = 1, }; static constexpr auto HorizontalResolution368 = Bit(6); static constexpr auto VerticalInterlace = Bit(5); static constexpr auto DisplayAreaColorDepth = BitRange::from_to(4, 4); static constexpr auto VideoMode = BitRange::from_to(3, 3); static constexpr auto VerticalResolution = BitRange::from_to(2, 2); static constexpr auto HorizontalResolution = BitRange::from_to(0, 1); static constexpr uint32_t PAL() { return ComplexBitMap::with( Mode::HorizontalResolution.with(GPU_IO::HorizontalResolution::$320), Mode::VerticalResolution.with(GPU_IO::VerticalResolution::$240), Mode::VideoMode.with(TVEncoding::PAL), Mode::DisplayAreaColorDepth.with(GPU_IO::DisplayAreaColorDepth::$15bit) ).raw; } static constexpr uint32_t NTSC() { return ComplexBitMap::with( Mode::HorizontalResolution.with(GPU_IO::HorizontalResolution::$320), Mode::VerticalResolution.with(GPU_IO::VerticalResolution::$240), Mode::VideoMode.with(TVEncoding::NTSC), Mode::DisplayAreaColorDepth.with(GPU_IO::DisplayAreaColorDepth::$15bit) ).raw; } }; static void configurate() { static constexpr uint16_t FirstVisiblePixelH = 0x260; #ifdef JABYENGINE_PAL static constexpr uint16_t FirstVisiblePixelV = 0xA3; GPU_IO::GP1.write(GPU_IO::Command::GP1::DisplayMode(Mode::PAL())); GPU::Screen::set_offset(0, 0); #else static constexpr uint16_t FirstVisiblePixelV = 0x88; GPU_IO::GP1.write(GPU_IO::Command::GP1::DisplayMode(Mode::NTSC())); GPU::Screen::set_offset(0, 5); //< Random values #endif } static void exchange_buffer_and_display(); }; static void set_draw_area(uint16_t x, uint16_t y) { GPU_IO::GP0.write(GPU_IO::Command::GP0::DrawAreaTopLeft(x, y)); GPU_IO::GP0.write(GPU_IO::Command::GP0::DrawAreaBottomRight((x + Display::Width), (y + Display::Height))); } static void quick_fill_fast(const Color24& color, const PositionU16& pos, const SizeU16& size) { GPU_IO::GP0.write(GPU_IO::Command::GP0::QuickFill(color)); GPU_IO::GP0.write(GPU_IO::Command::GP0::TopLeftPosition(pos.x, pos.y)); GPU_IO::GP0.write(GPU_IO::Command::GP0::WidthHeight(size.width, size.height)); } static void reset_cmd_buffer() { GPU_IO::GP1.write(GPU_IO::Command::GP1::ResetCMDBufer()); } static void wait_ready_for_CMD() { while(!GPU_IO::GPUSTAT.read().is(GPU_IO::GPUStatusRegister::GP0ReadyForCMD)); } namespace DMA { static void wait() { while(::JabyEngine::DMA_IO::GPU.channel_ctrl.read().is(::JabyEngine::DMA_IO::CHCHR::Busy)); } static void end() { reset_cmd_buffer(); } namespace Receive { static void prepare() { GPU_IO::GP1.write(GPU_IO::Command::GP1::DMADirection(GPU_IO::DMADirection::CPU2GPU)); reset_cmd_buffer(); } static void set_src(uintptr_t adr) { DMA_IO::GPU.adr.write(DMA_IO::MADR::MemoryAdr.with(static_cast(adr))); } static void set_dst(const PositionU16& position, const SizeU16& size) { wait_ready_for_CMD(); GPU_IO::GP0.write(GPU_IO::Command::GP0::CPU2VRAM_Blitting()); GPU_IO::GP0.write(GPU_IO::Command::GP0::TopLeftPosition(position.x, position.y)); GPU_IO::GP0.write(GPU_IO::Command::GP0::WidthHeight(size.width, size.height)); } static void start(uint16_t blockCount, uint16_t wordsPerBlock = 0x10) { typedef DMA_IO::BCR::SyncMode1 SyncMode1; DMA_IO::GPU.block_ctrl.write(DMA_IO::BCR{SyncMode1::with(SyncMode1::BlockSize.with(wordsPerBlock), SyncMode1::BlockAmount.with(blockCount))}); DMA_IO::GPU.channel_ctrl.write(DMA_IO::CHCHR::StartGPUReceive()); } } } } } } #endif //!__JABYENGINE_GPU_INTERNAL_HPP__