#ifndef __JABYENGINE_DMA_IO_HPP__
#define __JABYENGINE_DMA_IO_HPP__
#include "ioport.hpp"

namespace JabyEngine {
    namespace DMA_IO {
        __declare_io_type(MADR, uint32_t, 
            static constexpr auto MemoryAdr = IOValueSet::from_to(0, 23);
        );

        __declare_io_type(BCR, uint32_t, 
            struct __no_align SyncMode0 {
                static constexpr auto NumberOfWords = IOValueSet::from_to(0, 15);
                static constexpr auto CD_OneBlock   = IOBitSet(16);
            };

            struct SyncMode1 : public ComplexBitMap<uint32_t> {
                static constexpr auto BlockSize   = IOValueSet::from_to(0, 15);
                static constexpr auto BlockAmount = IOValueSet::from_to(16, 31);
            };

            struct SyncMode2 {
            };
        );

        __declare_io_type(CHCHR, uint32_t, 
            enum SyncMode_t {
                Sync0 = 0, //Start immediately,
                Sync1 = 1, //Sync blocks to DMA requests
                Sync2 = 2, //Linked List
            };

            static constexpr auto ManualStart = IOBitSet(28);

            static constexpr auto Start = IOBitSet(24);
            static constexpr auto Busy  = Start;

            static constexpr auto ChoppingCPUWindowSize = IOValueSet::from_to(20, 22);
            static constexpr auto ChoppingDMAWindowSize = IOValueSet::from_to(16, 18);

            static constexpr auto SyncMode     = IOValueSet::from_to(9, 10);
            static constexpr auto UseSyncMode0 = SyncMode.with(Sync0);
            static constexpr auto UseSyncMode1 = SyncMode.with(Sync1);
            static constexpr auto UseSyncMode2 = SyncMode.with(Sync2);

            static constexpr auto UseChopping   = IOBitSet(8);

            static constexpr auto MemoryAdrDecreaseBy4 = IOBitSet(1);
            static constexpr auto MemoryAdrIncreaseBy4 = !MemoryAdrDecreaseBy4;

            static constexpr auto FromMainRAM = IOBitSet(0);
            static constexpr auto ToMainRAM   = !FromMainRAM;

            static constexpr Self StartMDECin() {
                return Self{0x01000201};
            }

            static constexpr Self StartMDECout() {
                return Self{0x01000200};
            }

            static constexpr Self StartGPUReceive() {
                return Self{0x01000201};
            }

            static constexpr Self StartCDROM() {
                return Self{0x11000000};
            }

            static constexpr Self StartSPUReceive() {
                return Self{0x01000201};
            }

            static constexpr Self StartOTC() {
                return Self{0x11000002};
            }
        );

        struct __no_align Registers {
            MADR_v  adr;
            BCR_v   block_ctrl;
            CHCHR_v channel_ctrl;

            void set_adr(uintptr_t adr) {
                this->adr.set(MADR_t::MemoryAdr.with(adr));
            }

            void wait() {                    
                while(this->channel_ctrl.is_set(CHCHR_t::Busy));
            }
        };

        // Those types do not need to be volatile because there members are
        typedef Registers MDECin_v;
        typedef Registers MDECout_v;
        typedef Registers GPU_v;
        typedef Registers CDROM_v;   
        typedef Registers SPU_v; 
        typedef Registers PIO_v;   
        typedef Registers OTC_v;

        //0: Highest, 7: Lowest
        typedef uint32_t Priority;
        static constexpr Priority HighestPriority = 0;
        static constexpr Priority LowestPriority  = 7;

        __declare_io_type(DPCR, uint32_t,
            static constexpr auto OTCEnable      = IOBitSet(27);
            static constexpr auto OTCPriority    = IOValueSet::from_to(24, 26);

            static constexpr auto PIOEnable      = IOBitSet(23);
            static constexpr auto PIOPriority    = IOValueSet::from_to(20, 22);

            static constexpr auto SPUEnable      = IOBitSet(19);
            static constexpr auto SPUPriority    = IOValueSet::from_to(16, 18);

            static constexpr auto CDROMEnable     = IOBitSet(15);
            static constexpr auto CDROMPriority   = IOValueSet::from_to(12, 14);

            static constexpr auto GPUEnable       = IOBitSet(11);
            static constexpr auto GPUPriority     = IOValueSet::from_to(8, 10);

            static constexpr auto MDECoutEnable   = IOBitSet(7);
            static constexpr auto MDECoutPriority = IOValueSet::from_to(4, 6);

            static constexpr auto MDECinEnable    = IOBitSet(3);
            static constexpr auto MDECinPriority  = IOValueSet::from_to(0, 2);
        );

        __declare_io_type(DICR, uint32_t, 
            static constexpr auto MasterEnable     = IOBitSet(31);
            static constexpr auto Flags            = IOValueSet::from_to(24, 30);
            static constexpr auto MasterEnableDPCR = IOBitSet(23);
            static constexpr auto EnableDPCR       = IOValueSet::from_to(16, 22);
            static constexpr auto ForceIRQ         = IOBitSet(15);
        );

        __declare_new_io_port(MDECin,  0x1F801080);
        __declare_new_io_port(MDECout, 0x1F801090);
        __declare_new_io_port(GPU,     0x1F8010A0);
        __declare_new_io_port(CDROM,   0x1F8010B0);
        __declare_new_io_port(SPU,     0x1F8010C0);
        __declare_new_io_port(PIO,     0x1F8010D0);
        __declare_new_io_port(OTC,     0x1F8010E0);

        __declare_new_io_port(DPCR, 0x1F8010F0);
        __declare_new_io_port(DICR, 0x1F8010F4);
    }
}
#endif //!__JABYENGINE_DMA_IO_HPP__