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Improve struct and namespace usage

This commit is contained in:
Jaby 2023-01-08 21:08:23 +01:00 committed by Jaby
parent 274b3dc243
commit 068eb48557
14 changed files with 169 additions and 177 deletions
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18
include/PSX/GPU/gpu.hpp
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@ -12,7 +12,7 @@
namespace JabyEngine { namespace JabyEngine {
namespace GPU { namespace GPU {
namespace Display { struct Display {
#ifdef JABYENGINE_PAL #ifdef JABYENGINE_PAL
static constexpr size_t Width = 320; static constexpr size_t Width = 320;
static constexpr size_t Height = 256; static constexpr size_t Height = 256;
@ -22,21 +22,19 @@ namespace JabyEngine {
#endif #endif
static void enable() { static void enable() {
GP1.write(Command::GP1::SetDisplayState(DisplayState::On)); GPU_IO::GP1.write(GPU_IO::Command::GP1::SetDisplayState(GPU_IO::DisplayState::On));
} }
static void disable() { static void disable() {
GP1.write(Command::GP1::SetDisplayState(DisplayState::Off)); GPU_IO::GP1.write(GPU_IO::Command::GP1::SetDisplayState(GPU_IO::DisplayState::Off));
}
} }
};
namespace Screen { struct Screen {
extern uint8_t CurrentDisplayAreaID; static uint8_t CurrentDisplayAreaID;
namespace Range { static void set_offset(uint16_t x, uint16_t y);
void set_offset(uint16_t x, uint16_t y); };
}
}
} }
} }
#endif //!__JABYENGINE_GPU_HPP__ #endif //!__JABYENGINE_GPU_HPP__

14
include/PSX/System/IOPorts/dma_io.hpp
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@ -3,7 +3,7 @@
#include "ioport.hpp" #include "ioport.hpp"
namespace JabyEngine { namespace JabyEngine {
namespace DMA { namespace DMA_IO {
struct __no_align MADR : public ComplexBitMap<uint32_t> { struct __no_align MADR : public ComplexBitMap<uint32_t> {
__io_port_inherit_complex_bit_map(MADR); __io_port_inherit_complex_bit_map(MADR);
@ -130,13 +130,13 @@ namespace JabyEngine {
static constexpr auto ForceIRQ = Bit<uint32_t>(15); static constexpr auto ForceIRQ = Bit<uint32_t>(15);
}; };
__declare_io_port_global(Registers, MDECin, 0x1F801080); __declare_io_port_global_struct(Registers, MDECin, 0x1F801080);
__declare_io_port_global(Registers, MDECout, 0x1F801090); __declare_io_port_global_struct(Registers, MDECout, 0x1F801090);
__declare_io_port_global_struct(Registers, GPU, 0x1F8010A0); __declare_io_port_global_struct(Registers, GPU, 0x1F8010A0);
__declare_io_port_global(Registers, CDROM, 0x1F8010B0); __declare_io_port_global_struct(Registers, CDROM, 0x1F8010B0);
__declare_io_port_global(Registers, SPU, 0x1F8010C0); __declare_io_port_global_struct(Registers, SPU, 0x1F8010C0);
__declare_io_port_global(Registers, PIO, 0x1F8010D0); __declare_io_port_global_struct(Registers, PIO, 0x1F8010D0);
__declare_io_port_global(Registers, OTC, 0x1F8010E0); __declare_io_port_global_struct(Registers, OTC, 0x1F8010E0);
__declare_io_port_global(DMAControlRegister, DPCR, 0x1F8010F0); __declare_io_port_global(DMAControlRegister, DPCR, 0x1F8010F0);
__declare_io_port_global(DMAInterruptRegister, DICR, 0x1F8010F4); __declare_io_port_global(DMAInterruptRegister, DICR, 0x1F8010F4);

10
include/PSX/System/IOPorts/gpu_io.hpp
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@ -4,7 +4,7 @@
#include "../../GPU/gpu_types.hpp" #include "../../GPU/gpu_types.hpp"
namespace JabyEngine { namespace JabyEngine {
namespace GPU { namespace GPU_IO {
enum struct SemiTransparency { enum struct SemiTransparency {
B_Half_add_F_Half = 0, B_Half_add_F_Half = 0,
B_add_F = 1, B_add_F = 1,
@ -47,11 +47,11 @@ namespace JabyEngine {
Off = 1 Off = 1
}; };
namespace Command { struct Command {
struct __no_align GP0 : public ComplexBitMap<uint32_t> { struct __no_align GP0 : public ComplexBitMap<uint32_t> {
__io_port_inherit_complex_bit_map(GP0); __io_port_inherit_complex_bit_map(GP0);
static constexpr GP0 QuickFill(Color24 color) { static constexpr GP0 QuickFill(GPU::Color24 color) {
return ComplexBitMap{(0x02 << 24) | color.raw()}; return ComplexBitMap{(0x02 << 24) | color.raw()};
} }
@ -132,7 +132,7 @@ namespace JabyEngine {
return ComplexBitMap{construct_cmd(0x08, mode)}; return ComplexBitMap{construct_cmd(0x08, mode)};
} }
}; };
} };
struct __no_align GPUStatusRegister : public ComplexBitMap<uint32_t> { struct __no_align GPUStatusRegister : public ComplexBitMap<uint32_t> {
static constexpr auto DrawingOddLinesInterlaced = Bit<uint32_t>(31); static constexpr auto DrawingOddLinesInterlaced = Bit<uint32_t>(31);
@ -144,7 +144,7 @@ namespace JabyEngine {
static constexpr auto InterruptRequest = Bit<uint32_t>(24); static constexpr auto InterruptRequest = Bit<uint32_t>(24);
static constexpr auto DisplayDisabled = Bit<uint32_t>(23); static constexpr auto DisplayDisabled = Bit<uint32_t>(23);
static constexpr auto VerticalInterlaceOn = Bit<uint32_t>(22); static constexpr auto VerticalInterlaceOn = Bit<uint32_t>(22);
static constexpr auto DisplayAreaColorDepth = BitRange<GPU::DisplayAreaColorDepth>::from_to(21, 21); static constexpr auto DisplayAreaColorDepth = BitRange<GPU_IO::DisplayAreaColorDepth>::from_to(21, 21);
static constexpr auto VideoModePal = Bit<uint32_t>(20); static constexpr auto VideoModePal = Bit<uint32_t>(20);
static constexpr auto VerticalResolutionValue = BitRange<VerticalResolution>::from_to(19, 19); static constexpr auto VerticalResolutionValue = BitRange<VerticalResolution>::from_to(19, 19);
static constexpr auto HorizontalResolutionValue = BitRange<HorizontalResolution>::from_to(17, 18); static constexpr auto HorizontalResolutionValue = BitRange<HorizontalResolution>::from_to(17, 18);

16
include/PSX/System/IOPorts/interrupt_io.hpp
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@ -3,7 +3,7 @@
#include "ioport.hpp" #include "ioport.hpp"
namespace JabyEngine { namespace JabyEngine {
namespace Interrupt { struct Interrupt {
static constexpr auto VBlank = Bit<uint32_t>(0); static constexpr auto VBlank = Bit<uint32_t>(0);
static constexpr auto GPU = Bit<uint32_t>(1); static constexpr auto GPU = Bit<uint32_t>(1);
static constexpr auto CDROM = Bit<uint32_t>(2); static constexpr auto CDROM = Bit<uint32_t>(2);
@ -17,16 +17,16 @@ namespace JabyEngine {
static constexpr auto Controller = Bit<uint32_t>(10); static constexpr auto Controller = Bit<uint32_t>(10);
static constexpr auto LightPen = Controller; static constexpr auto LightPen = Controller;
struct __no_align IRQStatus : public ComplexBitMap<uint32_t> { struct __no_align Status : public ComplexBitMap<uint32_t> {
__io_port_inherit_complex_bit_map(IRQStatus); __io_port_inherit_complex_bit_map(Status);
}; };
struct __no_align IRQMask : public ComplexBitMap<uint32_t> { struct __no_align Mask : public ComplexBitMap<uint32_t> {
__io_port_inherit_complex_bit_map(IRQMask); __io_port_inherit_complex_bit_map(Mask);
}; };
__declare_io_port_global(IRQStatus, Status, 0x1F801070); __declare_io_port_member(struct Status, Status, 0x1F801070);
__declare_io_port_global(IRQMask, Mask, 0x1F801074); __declare_io_port_member(struct Mask, Mask, 0x1F801074);
static bool is_irq(Bit<uint32_t> irq) { static bool is_irq(Bit<uint32_t> irq) {
return Status.read().is_bit_set(irq); return Status.read().is_bit_set(irq);
@ -43,7 +43,7 @@ namespace JabyEngine {
static void enable_irq(Bit<uint32_t> irq) { static void enable_irq(Bit<uint32_t> irq) {
Mask.write(Mask.read().set_bit(irq)); Mask.write(Mask.read().set_bit(irq));
} }
} };
} }
#endif //!__JABYENGINE_INTERRUPT_IO_HPP__ #endif //!__JABYENGINE_INTERRUPT_IO_HPP__

3
include/PSX/System/IOPorts/ioport.hpp
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@ -69,6 +69,9 @@ namespace JabyEngine {
#define __declare_io_port_global(type, name, adr) __declare_io_port_global_raw(, type, name, adr) #define __declare_io_port_global(type, name, adr) __declare_io_port_global_raw(, type, name, adr)
#define __declare_io_port_global_const(type, name, adr) __declare_io_port_global_raw(const, type, name, adr) #define __declare_io_port_global_const(type, name, adr) __declare_io_port_global_raw(const, type, name, adr)
#define __declare_io_port_member(type, name, adr) __declare_io_port_global_raw(inline, type, name, adr)
#define __declare_io_port_member_const(type, name, adr) __declare_io_port_global_raw(const inline, type, name, adr)
#define __declare_io_port_global_array(type, name, adr, size) static __always_inline auto& name = reinterpret_cast<type(&)[size]>(*reinterpret_cast<type*>((IO_Base_Adr + (adr & ~IO_Base_Mask)))) #define __declare_io_port_global_array(type, name, adr, size) static __always_inline auto& name = reinterpret_cast<type(&)[size]>(*reinterpret_cast<type*>((IO_Base_Adr + (adr & ~IO_Base_Mask))))
#define __declare_io_port_global_struct(type, name, adr) static __always_inline auto& name = *reinterpret_cast<type*>(__io_port_adr(adr)) #define __declare_io_port_global_struct(type, name, adr) static __always_inline auto& name = *reinterpret_cast<type*>(__io_port_adr(adr))

52
include/PSX/System/IOPorts/spu_io.hpp
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@ -3,7 +3,7 @@
#include "ioport.hpp" #include "ioport.hpp"
namespace JabyEngine { namespace JabyEngine {
namespace SPU { namespace SPU_IO {
enum struct Mode { enum struct Mode {
Linear = 0, Linear = 0,
Exponential = 1, Exponential = 1,
@ -129,34 +129,34 @@ namespace JabyEngine {
static constexpr size_t VoiceCount = 24; static constexpr size_t VoiceCount = 24;
namespace Key { struct Key {
__declare_io_port_global(ubus32_t, on, 0x1F801D88); __declare_io_port_member(ubus32_t, On, 0x1F801D88);
__declare_io_port_global(ubus32_t, off, 0x1F801D8C); __declare_io_port_member(ubus32_t, Off, 0x1F801D8C);
__declare_io_port_global(ubus32_t, status, 0x1F801D9C); __declare_io_port_member(ubus32_t, Status, 0x1F801D9C);
} };
namespace MainVolume { struct MainVolume {
__declare_io_port_global(SweepVolume, left, 0x1F801D80); __declare_io_port_member(SweepVolume, Left, 0x1F801D80);
__declare_io_port_global(SweepVolume, right, 0x1F801D82); __declare_io_port_member(SweepVolume, Right, 0x1F801D82);
} };
namespace CDVolume { struct CDVolume {
__declare_io_port_global(SimpleVolume, left, 0x1F801DB0); __declare_io_port_member(SimpleVolume, Left, 0x1F801DB0);
__declare_io_port_global(SimpleVolume, right, 0x1F801DB2); __declare_io_port_member(SimpleVolume, Right, 0x1F801DB2);
} };
namespace ExternalAudioInputVolume { struct ExternalAudioInputVolume {
__declare_io_port_global(SimpleVolume, left, 0x1F801DB4); __declare_io_port_member(SimpleVolume, Left, 0x1F801DB4);
__declare_io_port_global(SimpleVolume, right, 0x1F801DB6); __declare_io_port_member(SimpleVolume, Right, 0x1F801DB6);
} };
namespace Reverb { struct Reverb {
namespace Volume { struct Volume {
__declare_io_port_global(SimpleVolume, left, 0x1F801D84); __declare_io_port_member(SimpleVolume, Left, 0x1F801D84);
__declare_io_port_global(SimpleVolume, right, 0x1F801D86); __declare_io_port_member(SimpleVolume, Right, 0x1F801D86);
} };
__declare_io_port_global(uint16_t, work_area_adr, 0x1F801DA2); __declare_io_port_member(uint16_t, WorkAreaAdr, 0x1F801DA2);
} };
__declare_io_port_global(ControlRegister, Control, 0x1F801DAA); __declare_io_port_global(ControlRegister, Control, 0x1F801DAA);
__declare_io_port_global(uint16_t, DataTransferControl, 0x1F801DAC); __declare_io_port_global(uint16_t, DataTransferControl, 0x1F801DAC);
@ -164,7 +164,7 @@ namespace JabyEngine {
__declare_io_port_global(NoiseGenerator, NON, 0x1F801D94); __declare_io_port_global(NoiseGenerator, NON, 0x1F801D94);
__declare_io_port_global(EchoOn, EON, 0x1F801D98); __declare_io_port_global(EchoOn, EON, 0x1F801D98);
__declare_io_port_global_array(Voice, Voices, 0x1F801C00, VoiceCount); __declare_io_port_global_array(struct Voice, Voice, 0x1F801C00, VoiceCount);
} }
} }
#endif //!__JABYENGINE_SPU_IO_HPP__ #endif //!__JABYENGINE_SPU_IO_HPP__

28
include/PSX/System/IOPorts/timer_io.hpp
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@ -3,9 +3,7 @@
#include "ioport.hpp" #include "ioport.hpp"
namespace JabyEngine { namespace JabyEngine {
namespace Timer { namespace Timer_IO {
enum struct SyncMode {};
struct __no_align CounterMode : public ComplexBitMap<uint32_t> { struct __no_align CounterMode : public ComplexBitMap<uint32_t> {
__io_port_inherit_complex_bit_map(CounterMode); __io_port_inherit_complex_bit_map(CounterMode);
@ -31,19 +29,19 @@ namespace JabyEngine {
static constexpr auto CounterTargetValue = BitRange<uint32_t>::from_to(0, 15); static constexpr auto CounterTargetValue = BitRange<uint32_t>::from_to(0, 15);
}; };
struct __no_align TimerInfo { struct __no_align Counter {
IOPort<uint32_t> value; IOPort<uint32_t> value;
IOPort<CounterMode> mode; IOPort<CounterMode> mode;
IOPort<CounterTarget> target; IOPort<CounterTarget> target;
private: private:
uint32_t _unused[1]; uint32_t _unused;
}; };
static constexpr uintptr_t counter_base_adr(size_t ID) { static constexpr uintptr_t counter_base_adr(size_t ID) {
return (0x1F801100 + (ID*0x10)); return (0x1F801100 + (ID*0x10));
} }
namespace Counter0 { struct __no_align Counter0 : public Counter {
struct SyncMode { struct SyncMode {
static constexpr auto Pause_During_Hblank = CounterMode::SyncMode.with(0); static constexpr auto Pause_During_Hblank = CounterMode::SyncMode.with(0);
static constexpr auto Zero_At_Hblank = CounterMode::SyncMode.with(1); static constexpr auto Zero_At_Hblank = CounterMode::SyncMode.with(1);
@ -57,11 +55,9 @@ namespace JabyEngine {
static constexpr auto System_Clock_Too = CounterMode::ClockSource.with(2); static constexpr auto System_Clock_Too = CounterMode::ClockSource.with(2);
static constexpr auto Dot_Clock_Too = CounterMode::ClockSource.with(3); static constexpr auto Dot_Clock_Too = CounterMode::ClockSource.with(3);
}; };
};
__declare_io_port_global_struct(TimerInfo, Timer, counter_base_adr(0)); struct __no_align Counter1 : public Counter {
}
namespace Counter1 {
struct SyncMode { struct SyncMode {
static constexpr auto Pause_During_Vblank = CounterMode::SyncMode.with(0); static constexpr auto Pause_During_Vblank = CounterMode::SyncMode.with(0);
static constexpr auto Zero_At_Vblank = CounterMode::SyncMode.with(1); static constexpr auto Zero_At_Vblank = CounterMode::SyncMode.with(1);
@ -75,11 +71,9 @@ namespace JabyEngine {
static constexpr auto System_Clock_Too = CounterMode::ClockSource.with(2); static constexpr auto System_Clock_Too = CounterMode::ClockSource.with(2);
static constexpr auto Hblank_Too = CounterMode::ClockSource.with(3); static constexpr auto Hblank_Too = CounterMode::ClockSource.with(3);
}; };
};
__declare_io_port_global_struct(TimerInfo, Timer, counter_base_adr(1)); struct __no_align Counter2 : public Counter {
}
namespace Counter2 {
struct SyncMode { struct SyncMode {
static constexpr auto Stop_Counter = CounterMode::SyncMode.with(0); static constexpr auto Stop_Counter = CounterMode::SyncMode.with(0);
static constexpr auto Freerun = CounterMode::SyncMode.with(1); static constexpr auto Freerun = CounterMode::SyncMode.with(1);
@ -93,9 +87,11 @@ namespace JabyEngine {
static constexpr auto System_Clock_Div_8 = CounterMode::ClockSource.with(2); static constexpr auto System_Clock_Div_8 = CounterMode::ClockSource.with(2);
static constexpr auto System_Clock_Div_8_Too = CounterMode::ClockSource.with(3); static constexpr auto System_Clock_Div_8_Too = CounterMode::ClockSource.with(3);
}; };
};
__declare_io_port_global_struct(TimerInfo, Timer, counter_base_adr(2)); __declare_io_port_global_struct(struct Counter0, Counter0, counter_base_adr(0));
} __declare_io_port_global_struct(struct Counter1, Counter1, counter_base_adr(1));
__declare_io_port_global_struct(struct Counter2, Counter2, counter_base_adr(2));
} }
} }

66
src/Library/include/GPU/gpu.hpp
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@ -4,11 +4,9 @@
#include <PSX/System/IOPorts/dma_io.hpp> #include <PSX/System/IOPorts/dma_io.hpp>
#include <PSX/System/IOPorts/gpu_io.hpp> #include <PSX/System/IOPorts/gpu_io.hpp>
#include <stdio.h>
namespace JabyEngine { namespace JabyEngine {
namespace GPU { namespace GPU {
namespace Screen { struct ScreenHelper {
struct Mode { struct Mode {
enum struct TVEncoding { enum struct TVEncoding {
NTSC = 0, NTSC = 0,
@ -17,26 +15,26 @@ namespace JabyEngine {
static constexpr auto HorizontalResolution368 = Bit<uint32_t>(6); static constexpr auto HorizontalResolution368 = Bit<uint32_t>(6);
static constexpr auto VerticalInterlace = Bit<uint32_t>(5); static constexpr auto VerticalInterlace = Bit<uint32_t>(5);
static constexpr auto DisplayAreaColorDepth = BitRange<GPU::DisplayAreaColorDepth>::from_to(4, 4); static constexpr auto DisplayAreaColorDepth = BitRange<GPU_IO::DisplayAreaColorDepth>::from_to(4, 4);
static constexpr auto VideoMode = BitRange<TVEncoding>::from_to(3, 3); static constexpr auto VideoMode = BitRange<TVEncoding>::from_to(3, 3);
static constexpr auto VerticalResolution = BitRange<GPU::VerticalResolution>::from_to(2, 2); static constexpr auto VerticalResolution = BitRange<GPU_IO::VerticalResolution>::from_to(2, 2);
static constexpr auto HorizontalResolution = BitRange<GPU::HorizontalResolution>::from_to(0, 1); static constexpr auto HorizontalResolution = BitRange<GPU_IO::HorizontalResolution>::from_to(0, 1);
static constexpr uint32_t PAL() { static constexpr uint32_t PAL() {
return ComplexBitMap<uint32_t>::with( return ComplexBitMap<uint32_t>::with(
Mode::HorizontalResolution.with(GPU::HorizontalResolution::$320), Mode::HorizontalResolution.with(GPU_IO::HorizontalResolution::$320),
Mode::VerticalResolution.with(GPU::VerticalResolution::$240), Mode::VerticalResolution.with(GPU_IO::VerticalResolution::$240),
Mode::VideoMode.with(TVEncoding::PAL), Mode::VideoMode.with(TVEncoding::PAL),
Mode::DisplayAreaColorDepth.with(GPU::DisplayAreaColorDepth::$15bit) Mode::DisplayAreaColorDepth.with(GPU_IO::DisplayAreaColorDepth::$15bit)
).raw; ).raw;
} }
static constexpr uint32_t NTSC() { static constexpr uint32_t NTSC() {
return ComplexBitMap<uint32_t>::with( return ComplexBitMap<uint32_t>::with(
Mode::HorizontalResolution.with(GPU::HorizontalResolution::$320), Mode::HorizontalResolution.with(GPU_IO::HorizontalResolution::$320),
Mode::VerticalResolution.with(GPU::VerticalResolution::$240), Mode::VerticalResolution.with(GPU_IO::VerticalResolution::$240),
Mode::VideoMode.with(TVEncoding::NTSC), Mode::VideoMode.with(TVEncoding::NTSC),
Mode::DisplayAreaColorDepth.with(GPU::DisplayAreaColorDepth::$15bit) Mode::DisplayAreaColorDepth.with(GPU_IO::DisplayAreaColorDepth::$15bit)
).raw; ).raw;
} }
}; };
@ -47,41 +45,41 @@ namespace JabyEngine {
#ifdef JABYENGINE_PAL #ifdef JABYENGINE_PAL
static constexpr uint16_t FirstVisiblePixelV = 0xA3; static constexpr uint16_t FirstVisiblePixelV = 0xA3;
GP1.write(Command::GP1::DisplayMode(Mode::PAL())); GPU_IO::GP1.write(GPU_IO::Command::GP1::DisplayMode(Mode::PAL()));
GPU::Screen::Range::set_offset(0, 0); GPU::Screen::set_offset(0, 0);
#else #else
static constexpr uint16_t FirstVisiblePixelV = 0x88; static constexpr uint16_t FirstVisiblePixelV = 0x88;
GP1.write(Command::GP1::DisplayMode(Mode::NTSC())); GPU_IO::GP1.write(GPU_IO::Command::GP1::DisplayMode(Mode::NTSC()));
GPU::Screen::set_offset(0, 5); //< Random values GPU::Screen::set_offset(0, 5); //< Random values
#endif #endif
} }
void exchange_buffer_and_display(); static void exchange_buffer_and_display();
} };
static void set_draw_area(uint16_t x, uint16_t y) { static void set_draw_area(uint16_t x, uint16_t y) {
GP0.write(Command::GP0::DrawAreaTopLeft(x, y)); GPU_IO::GP0.write(GPU_IO::Command::GP0::DrawAreaTopLeft(x, y));
GP0.write(Command::GP0::DrawAreaBottomRight((x + Display::Width), (y + Display::Height))); GPU_IO::GP0.write(GPU_IO::Command::GP0::DrawAreaBottomRight((x + Display::Width), (y + Display::Height)));
} }
static void quick_fill_fast(const Color24& color, const PositionU16& pos, const SizeU16& size) { static void quick_fill_fast(const Color24& color, const PositionU16& pos, const SizeU16& size) {
GP0.write(Command::GP0::QuickFill(color)); GPU_IO::GP0.write(GPU_IO::Command::GP0::QuickFill(color));
GP0.write(Command::GP0::TopLeftPosition(pos.x, pos.y)); GPU_IO::GP0.write(GPU_IO::Command::GP0::TopLeftPosition(pos.x, pos.y));
GP0.write(Command::GP0::WidthHeight(size.width, size.height)); GPU_IO::GP0.write(GPU_IO::Command::GP0::WidthHeight(size.width, size.height));
} }
static void reset_cmd_buffer() { static void reset_cmd_buffer() {
GP1.write(Command::GP1::ResetCMDBufer()); GPU_IO::GP1.write(GPU_IO::Command::GP1::ResetCMDBufer());
} }
static void wait_ready_for_CMD() { static void wait_ready_for_CMD() {
while(!GPUSTAT.read().is(GPUStatusRegister::GP0ReadyForCMD)); while(!GPU_IO::GPUSTAT.read().is(GPU_IO::GPUStatusRegister::GP0ReadyForCMD));
} }
namespace DMA { namespace DMA {
static void wait() { static void wait() {
while(::JabyEngine::DMA::GPU.channel_ctrl.read().is(::JabyEngine::DMA::CHCHR::Busy)); while(::JabyEngine::DMA_IO::GPU.channel_ctrl.read().is(::JabyEngine::DMA_IO::CHCHR::Busy));
} }
static void end() { static void end() {
@ -91,28 +89,26 @@ namespace JabyEngine {
namespace Receive { namespace Receive {
static void prepare() static void prepare()
{ {
GP1.write(Command::GP1::DMADirection(DMADirection::CPU2GPU)); GPU_IO::GP1.write(GPU_IO::Command::GP1::DMADirection(GPU_IO::DMADirection::CPU2GPU));
reset_cmd_buffer(); reset_cmd_buffer();
} }
static void set_src(uintptr_t adr) { static void set_src(uintptr_t adr) {
printf("Source: 0x%p\n", adr); DMA_IO::GPU.adr.write(DMA_IO::MADR::MemoryAdr.with(static_cast<uint32_t>(adr)));
::JabyEngine::DMA::GPU.adr.write(::JabyEngine::DMA::MADR::MemoryAdr.with(static_cast<uint32_t>(adr)));
} }
static void set_dst(const PositionU16& position, const SizeU16& size) { static void set_dst(const PositionU16& position, const SizeU16& size) {
wait_ready_for_CMD(); wait_ready_for_CMD();
GP0.write(Command::GP0::CPU2VRAM_Blitting()); GPU_IO::GP0.write(GPU_IO::Command::GP0::CPU2VRAM_Blitting());
GP0.write(Command::GP0::TopLeftPosition(position.x, position.y)); GPU_IO::GP0.write(GPU_IO::Command::GP0::TopLeftPosition(position.x, position.y));
GP0.write(Command::GP0::WidthHeight(size.width, size.height)); GPU_IO::GP0.write(GPU_IO::Command::GP0::WidthHeight(size.width, size.height));
} }
static void start(uint16_t blockCount, uint16_t wordsPerBlock = 0x10) { static void start(uint16_t blockCount, uint16_t wordsPerBlock = 0x10) {
typedef ::JabyEngine::DMA::BCR::SyncMode1 SyncMode1; typedef DMA_IO::BCR::SyncMode1 SyncMode1;
::JabyEngine::DMA::GPU.block_ctrl.write(SyncMode1::with(SyncMode1::BlockSize.with(wordsPerBlock), SyncMode1::BlockAmount.with(blockCount))); DMA_IO::GPU.block_ctrl.write(SyncMode1::with(SyncMode1::BlockSize.with(wordsPerBlock), SyncMode1::BlockAmount.with(blockCount)));
::JabyEngine::DMA::GPU.channel_ctrl.write(::JabyEngine::DMA::CHCHR::StartGPUReceive()); DMA_IO::GPU.channel_ctrl.write(DMA_IO::CHCHR::StartGPUReceive());
} }
} }
} }

6
src/Library/src/BootLoader/gpu_boot.cpp
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@ -46,9 +46,9 @@ namespace JabyEngine {
} }
void setup() { void setup() {
GP1.write(Command::GP1::Reset()); GPU_IO::GP1.write(GPU_IO::Command::GP1::Reset());
Screen::configurate(); ScreenHelper::configurate();
Screen::exchange_buffer_and_display(); ScreenHelper::exchange_buffer_and_display();
GPU::wait_ready_for_CMD(); GPU::wait_ready_for_CMD();
quick_fill_fast(Color24::Black(), PositionU16(32, 0), SizeU16(Display::Width, Display::Height)); quick_fill_fast(Color24::Black(), PositionU16(32, 0), SizeU16(Display::Width, Display::Height));

52
src/Library/src/BootLoader/spu_boot.cpp
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@ -7,32 +7,32 @@ namespace JabyEngine {
using namespace JabyEngine; using namespace JabyEngine;
static void clear_main_volume() { static void clear_main_volume() {
static constexpr auto StartVol = SweepVolume::with(SweepVolume::VolumeEnable, SweepVolume::Volume.with(I16_MAX >> 2)); static constexpr auto StartVol = SPU_IO::SweepVolume::with(SPU_IO::SweepVolume::VolumeEnable, SPU_IO::SweepVolume::Volume.with(I16_MAX >> 2));
MainVolume::left.write(StartVol); SPU_IO::MainVolume::Left.write(StartVol);
MainVolume::right.write(StartVol); SPU_IO::MainVolume::Right.write(StartVol);
} }
static void clear_cd_and_ext_audio_volume() { static void clear_cd_and_ext_audio_volume() {
CDVolume::left.write(0); SPU_IO::CDVolume::Left.write(0);
CDVolume::right.write(0); SPU_IO::CDVolume::Right.write(0);
ExternalAudioInputVolume::left.write(0); SPU_IO::ExternalAudioInputVolume::Left.write(0);
ExternalAudioInputVolume::right.write(0); SPU_IO::ExternalAudioInputVolume::Right.write(0);
} }
static void clear_control_register() { static void clear_control_register() {
Control.write(ControlRegister()); SPU_IO::Control.write(SPU_IO::ControlRegister());
} }
static void clear_voice() { static void clear_voice() {
for(auto& voice : Voices) { for(auto& voice : SPU_IO::Voice) {
voice.volumeLeft.write(SweepVolume()); voice.volumeLeft.write(SPU_IO::SweepVolume());
voice.volumeRight.write(SweepVolume()); voice.volumeRight.write(SPU_IO::SweepVolume());
voice.sampleRate.write(SampleRate()); voice.sampleRate.write(SPU_IO::SampleRate());
voice.ad.write(AD()); voice.ad.write(SPU_IO::AD());
voice.sr.write(SR()); voice.sr.write(SPU_IO::SR());
voice.currentVolume.write(SimpleVolume(0)); voice.currentVolume.write(SPU_IO::SimpleVolume(0));
voice.adr.write(0x200); voice.adr.write(0x200);
voice.repeatAdr.write(0x200); voice.repeatAdr.write(0x200);
@ -40,37 +40,37 @@ namespace JabyEngine {
} }
static void clear_pmon() { static void clear_pmon() {
PMON.write(PitchModFlags()); SPU_IO::PMON.write(SPU_IO::PitchModFlags());
} }
static void clear_noise_and_echo() { static void clear_noise_and_echo() {
NON.write(NoiseGenerator()); SPU_IO::NON.write(SPU_IO::NoiseGenerator());
EON.write(EchoOn()); SPU_IO::EON.write(SPU_IO::EchoOn());
} }
static void clear_reverb() { static void clear_reverb() {
Reverb::Volume::left.write(0); SPU_IO::Reverb::Volume::Left.write(0);
Reverb::Volume::right.write(0); SPU_IO::Reverb::Volume::Right.write(0);
Reverb::work_area_adr.write(0); SPU_IO::Reverb::WorkAreaAdr.write(0);
} }
static void setup_control_register() { static void setup_control_register() {
static constexpr auto SetupValue = ControlRegister::with(ControlRegister::Enable, ControlRegister::Unmute, ControlRegister::CDAudioEnable); static constexpr auto SetupValue = SPU_IO::ControlRegister::with(SPU_IO::ControlRegister::Enable, SPU_IO::ControlRegister::Unmute, SPU_IO::ControlRegister::CDAudioEnable);
Control.write(SetupValue); SPU_IO::Control.write(SetupValue);
} }
static void setup_data_transfer_control() { static void setup_data_transfer_control() {
static constexpr uint16_t RequiredValue = (2 << 1); static constexpr uint16_t RequiredValue = (2 << 1);
DataTransferControl.write(RequiredValue); SPU_IO::DataTransferControl.write(RequiredValue);
} }
static void wait_voices() { static void wait_voices() {
static constexpr int16_t Treshhold = (I16_MAX*0.03); static constexpr int16_t Treshhold = (I16_MAX*0.03);
try_again: try_again:
for(const auto& voice : Voices) { for(const auto& voice : SPU_IO::Voice) {
if(voice.currentVolume.read() > Treshhold) { if(voice.currentVolume.read() > Treshhold) {
goto try_again; goto try_again;
} }
@ -78,7 +78,7 @@ namespace JabyEngine {
} }
void stop_voices() { void stop_voices() {
Key::off.write(UI32_MAX); SPU_IO::Key::Off.write(UI32_MAX);
} }
void setup() { void setup() {

2
src/Library/src/BootLoader/start_boot.cpp
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@ -7,7 +7,7 @@
namespace JabyEngine { namespace JabyEngine {
namespace Setup { namespace Setup {
static void enable_DMA() { static void enable_DMA() {
DMA::DPCR.write(DMA::DPCR.read() | DMA::DMAControlRegister::SPUEnable | DMA::DMAControlRegister::GPUEnable); DMA_IO::DPCR.write(DMA_IO::DPCR.read() | DMA_IO::DMAControlRegister::SPUEnable | DMA_IO::DMAControlRegister::GPUEnable);
} }
JabyEngine::NextRoutine start() { JabyEngine::NextRoutine start() {

6
src/Library/src/BootLoader/timer_boot.cpp
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@ -28,6 +28,8 @@ namespace JabyEngine {
} }
void setup() { void setup() {
using namespace Timer_IO;
static constexpr auto Mode = CounterMode::with(CounterMode::FreeRun, Counter2::SyncMode::Freerun, CounterMode::ResetAfterTarget, CounterMode::IRQAtTarget, CounterMode::IRQEveryTime, CounterMode::IRQPulse, Counter2::Source::System_Clock_Div_8); static constexpr auto Mode = CounterMode::with(CounterMode::FreeRun, Counter2::SyncMode::Freerun, CounterMode::ResetAfterTarget, CounterMode::IRQAtTarget, CounterMode::IRQEveryTime, CounterMode::IRQPulse, Counter2::Source::System_Clock_Div_8);
static constexpr uint16_t Target = MS_Per_Tick<uint16_t>(CPU_Frequncey_Hz_Div8)*10; static constexpr uint16_t Target = MS_Per_Tick<uint16_t>(CPU_Frequncey_Hz_Div8)*10;
@ -37,8 +39,8 @@ namespace JabyEngine {
__syscall_SysEnqIntRP(Timer2Irq, &IRQCallback); __syscall_SysEnqIntRP(Timer2Irq, &IRQCallback);
__syscall_ExitCriticalSection(); __syscall_ExitCriticalSection();
Counter2::Timer.target.write(CounterTarget::CounterTargetValue.with(Target)); Counter2.target.write(CounterTarget::CounterTargetValue.with(Target));
Counter2::Timer.mode.write(Mode); Counter2.mode.write(Mode);
Interrupt::enable_irq(Interrupt::Timer2); Interrupt::enable_irq(Interrupt::Timer2);
} }

38
src/Library/src/GPU/GPU.cpp
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@ -1,38 +0,0 @@
#include "../include/GPU/gpu.hpp"
namespace JabyEngine {
namespace GPU {
namespace Screen {
uint8_t CurrentDisplayAreaID = 1; //< Setup will call exchange and set it to 0
namespace Range {
#ifdef JABYENGINE_PAL
static constexpr uint16_t ScanlinesV = 288;
#else
static constexpr uint16_t ScanlinesV = 240;
#endif //JABYENGINE_PAL
#ifndef USE_NO$PSX
void set_offset(uint16_t x, uint16_t y) {
x += 78;
y += 43;
GP1.write(Command::GP1::HorizontalDisplayRange((x << 3), (x + Display::Width) << 3));
GP1.write(Command::GP1::VerticalDisplayRange(y, y + Display::Height));
}
#else
void set_offset(uint16_t x, uint16_t y) {
GP1.write(Command::GP1::HorizontalDisplayRange(x, (x + Display::Width*8)));
GP1.write(Command::GP1::VerticalDisplayRange(y - (ScanlinesV/2), y + (ScanlinesV/2)));
}
#endif //USE_NO$PSX
}
void exchange_buffer_and_display() {
GPU::set_draw_area(0, (Display::Height*CurrentDisplayAreaID));
CurrentDisplayAreaID ^= 1;
GP1.write(Command::GP1::DisplayArea(0, (Display::Height*CurrentDisplayAreaID)));
}
}
}
}

35
src/Library/src/GPU/gpu.cpp Normal file
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@ -0,0 +1,35 @@
#include "../include/GPU/gpu.hpp"
namespace JabyEngine {
namespace GPU {
uint8_t Screen :: CurrentDisplayAreaID = 1; //< Setup will call exchange and set it to 0
#ifdef JABYENGINE_PAL
static constexpr uint16_t ScanlinesV = 288;
#else
static constexpr uint16_t ScanlinesV = 240;
#endif //JABYENGINE_PAL
void ScreenHelper :: exchange_buffer_and_display() {
GPU::set_draw_area(0, (Display::Height*Screen::CurrentDisplayAreaID));
Screen::CurrentDisplayAreaID ^= 1;
GPU_IO::GP1.write(GPU_IO::Command::GP1::DisplayArea(0, (Display::Height*Screen::CurrentDisplayAreaID)));
}
#ifndef USE_NO$PSX
void Screen :: set_offset(uint16_t x, uint16_t y) {
x += 78;
y += 43;
GPU_IO::GP1.write(GPU_IO::Command::GP1::HorizontalDisplayRange((x << 3), (x + Display::Width) << 3));
GPU_IO::GP1.write(GPU_IO::Command::GP1::VerticalDisplayRange(y, y + Display::Height));
}
#else
void Screen :: set_offset(uint16_t x, uint16_t y) {
GP1.write(Command::GP1::HorizontalDisplayRange(x, (x + Display::Width*8)));
GP1.write(Command::GP1::VerticalDisplayRange(y - (ScanlinesV/2), y + (ScanlinesV/2)));
}
#endif //USE_NO$PSX
}
}