jaby/jabyengine
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases 1 Wiki Activity

Finish clean-up

Browse Source
This commit is contained in:
jaby
2023-09-22 20:53:26 +02:00
parent 32682aa2f0
commit 09aed0ffc4
11 changed files with 240 additions and 265 deletions
Download Patch File Download Diff File Expand all files Collapse all files

34
include/PSX/System/IOPorts/dma_io.hpp
View File

@@ -4,11 +4,11 @@
namespace JabyEngine {
namespace DMA_IO {
__new_declare_io_value(MADR, uint32_t) {
__declare_io_value(MADR, uint32_t) {
static constexpr auto MemoryAdr = BitRange::from_to(0, 23);
};
__new_declare_io_value(BCR, uint32_t) {
__declare_io_value(BCR, uint32_t) {
struct SyncMode0 {
static constexpr auto NumberOfWords = BitRange::from_to(0, 15);
static constexpr auto CD_OneBlock = Bit(16);
@@ -31,7 +31,7 @@ namespace JabyEngine {
};
};
__new_declare_io_value(CHCHR, uint32_t) {
__declare_io_value(CHCHR, uint32_t) {
enum SyncMode_t {
Sync0 = 0, //Start immediately,
Sync1 = 1, //Sync blocks to DMA requests
@@ -90,9 +90,9 @@ namespace JabyEngine {
#pragma pack(push, 1)
struct Registers {
New::IOPort<MADR> adr;
New::IOPort<BCR> block_ctrl;
New::IOPort<CHCHR> channel_ctrl;
IOPort<MADR> adr;
IOPort<BCR> block_ctrl;
IOPort<CHCHR> channel_ctrl;
inline void set_adr(uintptr_t adr) {
this->adr.write({bit::value::set_normalized(0u, MADR::MemoryAdr.with(adr))});
@@ -109,7 +109,7 @@ namespace JabyEngine {
static constexpr Priority HighestPriority = 0;
static constexpr Priority LowestPriority = 7;
__new_declare_io_value(DPCR, uint32_t) {
__declare_io_value(DPCR, uint32_t) {
static constexpr auto OTCEnable = Bit(27);
static constexpr auto OTCPriority = BitRange::from_to(24, 26);
@@ -132,7 +132,7 @@ namespace JabyEngine {
static constexpr auto MDECinPriority = BitRange::from_to(0, 2);
};
__new_declare_io_value(DICR, uint32_t) {
__declare_io_value(DICR, uint32_t) {
static constexpr auto MasterEnable = Bit(31);
static constexpr auto Flags = BitRange::from_to(24, 30);
static constexpr auto MasterEnableDPCR = Bit(23);
@@ -140,16 +140,16 @@ namespace JabyEngine {
static constexpr auto ForceIRQ = Bit(15);
};
__new_declare_value_at(, Registers, MDECin, 0x1F801080);
__new_declare_value_at(, Registers, MDECout, 0x1F801090);
__new_declare_value_at(, Registers, GPU, 0x1F8010A0);
__new_declare_value_at(, Registers, CDROM, 0x1F8010B0);
__new_declare_value_at(, Registers, SPU, 0x1F8010C0);
__new_declare_value_at(, Registers, PIO, 0x1F8010D0);
__new_declare_value_at(, Registers, OTC, 0x1F8010E0);
__declare_value_at(, Registers, MDECin, 0x1F801080);
__declare_value_at(, Registers, MDECout, 0x1F801090);
__declare_value_at(, Registers, GPU, 0x1F8010A0);
__declare_value_at(, Registers, CDROM, 0x1F8010B0);
__declare_value_at(, Registers, SPU, 0x1F8010C0);
__declare_value_at(, Registers, PIO, 0x1F8010D0);
__declare_value_at(, Registers, OTC, 0x1F8010E0);
__new_declare_io_port(, DPCR, 0x1F8010F0);
__new_declare_io_port(, DICR, 0x1F8010F4);
__declare_io_port(, DPCR, 0x1F8010F0);
__declare_io_port(, DICR, 0x1F8010F4);
}
}
#endif //!__JABYENGINE_DMA_IO_HPP__