jaby
/
jabyengine
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases 1 Wiki Activity

Remove Port namespace and clean up

This commit is contained in:
jaby 2022-09-11 15:51:09 +02:00
parent 30824748ea
commit 1eacebb014
8 changed files with 390 additions and 403 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
include/PSX/GPU/GPU.h
View File

@ -5,11 +5,11 @@
namespace GPU {
namespace Display {
static void enable() {
Port::GP1.write(Port::Command::GP1::SetDisplayState(Port::DisplayState::On));
GP1.write(Command::GP1::SetDisplayState(DisplayState::On));
}
static void disable() {
Port::GP1.write(Port::Command::GP1::SetDisplayState(Port::DisplayState::Off));
GP1.write(Command::GP1::SetDisplayState(DisplayState::Off));
}
}
}

2
include/PSX/System/IOPorts/DMA_IO.hpp
View File

@ -3,7 +3,6 @@
#include "IOPort.hpp"
namespace DMA {
namespace Port {
struct __no_align MADR : public ComplexBitMap<uint32_t> {
__io_port_inherit_complex_bit_map(MADR);
@ -140,7 +139,6 @@ namespace DMA {
__declare_io_port_global(DMAControlRegister, DPCR, 0x1F8010F0);
__declare_io_port_global(DMAInterruptRegister, DICR, 0x1F8010F4);
}
}
#endif //!__JABYENGINE_DMA_IO_HPP__

2
include/PSX/System/IOPorts/GPU_IO.hpp
View File

@ -4,7 +4,6 @@
#include "../../GPU/GPU_Types.hpp"
namespace GPU {
namespace Port {
enum struct SemiTransparency {
B_Half_add_F_Half = 0,
B_add_F = 1,
@ -122,7 +121,6 @@ namespace GPU {
__declare_io_port_global_const(uint32_t, GPUREAD, 0x1F801810);
__declare_io_port_global_const(GPUStatusRegister, GPUSTAT, 0x1F801814);
}
}
#endif //!__JABYENGINE_GPU_IO_HPP__

2
include/PSX/System/IOPorts/SPU_IO.hpp
View File

@ -3,7 +3,6 @@
#include "IOPort.hpp"
namespace SPU {
namespace Port {
enum struct Mode {
Linear = 0,
Exponential = 1,
@ -165,7 +164,6 @@ namespace SPU {
__declare_io_port_global(EchoOn, EON, 0x1F801D98);
__declare_io_port_global_array(Voice, Voices, 0x1F801C00, VoiceCount);
}
}
#endif //!__JABYENGINE_SPU_IO_HPP__

28
src/Library/include/GPU/GPU.h
View File

@ -6,22 +6,22 @@
namespace GPU {
static void quick_fill_fast(const Color24& color, const PositionU16& pos, const SizeU16& size) {
Port::GP0.write(Port::Command::GP0::QuickFill(color));
Port::GP0.write(Port::Command::GP0::TopLeftPosition(pos.x, pos.y));
Port::GP0.write(Port::Command::GP0::WidthHeight(size.width, size.height));
GP0.write(Command::GP0::QuickFill(color));
GP0.write(Command::GP0::TopLeftPosition(pos.x, pos.y));
GP0.write(Command::GP0::WidthHeight(size.width, size.height));
}
static void reset_cmd_buffer() {
Port::GP1.write(Port::Command::GP1::ResetCMDBufer());
GP1.write(Command::GP1::ResetCMDBufer());
}
static void wait_ready_for_CMD() {
while(!Port::GPUSTAT.ref().is(Port::GPUStatusRegister::GP0ReadyForCMD));
while(!GPUSTAT.ref().is(GPUStatusRegister::GP0ReadyForCMD));
}
namespace DMA {
static void wait() {
while(::DMA::Port::GPU.channel_ctrl.ref().is(::DMA::Port::CHCHR::Busy));
while(::DMA::GPU.channel_ctrl.ref().is(::DMA::CHCHR::Busy));
}
static void end() {
@ -31,27 +31,27 @@ namespace GPU {
namespace Receive {
static void prepare()
{
Port::GP1.write(Port::Command::GP1::DMADirection(Port::DMADirection::CPU2GPU));
GP1.write(Command::GP1::DMADirection(DMADirection::CPU2GPU));
reset_cmd_buffer();
}
static void set_src(uintptr_t adr) {
::DMA::Port::GPU.adr.ref().set_value(static_cast<uint32_t>(adr), ::DMA::Port::MADR::MemoryAdr);
::DMA::GPU.adr.ref().set_value(static_cast<uint32_t>(adr), ::DMA::MADR::MemoryAdr);
}
static void set_dst(const PositionU16& position, const SizeU16& size) {
wait_ready_for_CMD();
Port::GP0.write(Port::Command::GP0::CPU2VRAM_Blitting());
Port::GP0.write(Port::Command::GP0::TopLeftPosition(position.x, position.y));
Port::GP0.write(Port::Command::GP0::WidthHeight(size.width, size.height));
GP0.write(Command::GP0::CPU2VRAM_Blitting());
GP0.write(Command::GP0::TopLeftPosition(position.x, position.y));
GP0.write(Command::GP0::WidthHeight(size.width, size.height));
}
static void start(uint16_t blockCount, uint16_t wordsPerBlock = 0x10) {
typedef ::DMA::Port::BCR::SyncMode1 SyncMode1;
typedef ::DMA::BCR::SyncMode1 SyncMode1;
::DMA::Port::GPU.block_ctrl.write(SyncMode1::with(SyncMode1::BlockSize.with(wordsPerBlock), SyncMode1::BlockAmount.with(blockCount)));
::DMA::Port::GPU.channel_ctrl.write(::DMA::Port::CHCHR::StartGPUReceive());
::DMA::GPU.block_ctrl.write(SyncMode1::with(SyncMode1::BlockSize.with(wordsPerBlock), SyncMode1::BlockAmount.with(blockCount)));
::DMA::GPU.channel_ctrl.write(::DMA::CHCHR::StartGPUReceive());
}
}
}

2
src/Library/src/BootLoader/gpu_boot.cpp
View File

@ -36,7 +36,7 @@ namespace GPU {
}
void setup() {
Port::GP1.write(Port::Command::GP1::Reset());
GP1.write(Command::GP1::Reset());
quick_fill_fast(Color24::Black(), PositionU16(0, 0), SizeU16(640, 480));
}

4
src/Library/src/BootLoader/spu_boot.cpp
View File

@ -1,12 +1,8 @@
#include <PSX/System/IOPorts/SPU_IO.hpp>
#include <PSX/System/IOPorts/DMA_IO.hpp>
#include <stdio.h>
#include <limits.h>
namespace SPU {
using namespace Port;
using namespace DMA::Port;
static void clear_main_volume() {
static constexpr auto StartVol = SweepVolume::with(SweepVolume::VolumeEnable, SweepVolume::Volume.with(I16_MAX >> 2));

5
src/Library/src/BootLoader/start_boot.cpp
View File

@ -2,11 +2,9 @@
#include <PSX/System/IOPorts/DMA_IO.hpp>
#include <stdio.h>
using namespace DMA::Port;
namespace JabyEngine {
static void enable_DMA() {
DPCR.write(DPCR.read() | DMAControlRegister::SPUEnable | DMAControlRegister::GPUEnable);
DMA::DPCR.write(DMA::DPCR.read() | DMA::DMAControlRegister::SPUEnable | DMA::DMAControlRegister::GPUEnable);
}
void start() {
@ -15,7 +13,6 @@ namespace JabyEngine {
SPU::stop_voices();
GPU::display_logo();
//Load picture here
//Pause??
//Do not setup GPU for now