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Trying to run first GTE code

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jaby
2024-01-24 17:29:42 -05:00
parent 1922515228
commit 2c4fb231f2
4 changed files with 103 additions and 12 deletions
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39
include/PSX/GTE/gte_instruction.hpp
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@@ -3,19 +3,46 @@
namespace JabyEngine {
namespace GTE {
// Load vertex or normal to vertex register 0
static __always_inline void ldv0(const SVECTOR& vector) {
__asm__ volatile("lwc2 $0, 0(%0)":: "r"(&vector));
__asm__ volatile("lwc2 $1, 4(%0)":: "r"(&vector));
__asm__ volatile("lwc2 $0, 0(%0)" :: "r"(&vector));
__asm__ volatile("lwc2 $1, 4(%0)" :: "r"(&vector));
}
// Load vertex or normal to vertex register 1
static __always_inline void ldv1(const SVECTOR& vector) {
__asm__ volatile("lwc2 $2, 0(%0)":: "r"(&vector));
__asm__ volatile("lwc2 $3, 4(%0)":: "r"(&vector));
__asm__ volatile("lwc2 $2, 0(%0)" :: "r"(&vector));
__asm__ volatile("lwc2 $3, 4(%0)" :: "r"(&vector));
}
// Load vertex or normal to vertex register 2
static __always_inline void ldv2(const SVECTOR& vector) {
__asm__ volatile("lwc2 $4, 0(%0)":: "r"(&vector));
__asm__ volatile("lwc2 $5, 4(%0)":: "r"(&vector));
__asm__ volatile("lwc2 $4, 0(%0)" :: "r"(&vector));
__asm__ volatile("lwc2 $5, 4(%0)" :: "r"(&vector));
}
// Store flag
static __always_inline void stflg(int32_t& flag) {
__asm__ volatile("cfc2 $12, $31" :: "r"(&flag) : "$12", "memory");
__asm__ volatile("nop" :: "r"(&flag) : "$12", "memory");
__asm__ volatile("sw $12, 0(%0)" :: "r"(&flag) : "$12", "memory");
}
// Store VECTOR from 32 bit universal register
static __always_inline void stlvnl(VECTOR& out_vector) {
__asm__ volatile("swc2 $25, 0(%0)" :: "r"(&out_vector) : "memory");
__asm__ volatile("swc2 $26, 4(%0)" :: "r"(&out_vector) : "memory");
__asm__ volatile("swc2 $27, 8(%0)" :: "r"(&out_vector) : "memory");
}
/*
Kernel of RotTrans
(Transfer vector)+(Rotation Matrix)*(vertex register 0)
*/
static __always_inline void rt() {
__asm__ volatile("nop");
__asm__ volatile("nop");
__asm__ volatile("cop2 0x0480012");
}
}
}