Use DMA for GPU

This commit is contained in:
Jaby
2022-09-11 15:44:45 +02:00
parent 2a97f7fa68
commit 303ffbccc9
8 changed files with 143 additions and 20 deletions

View File

@@ -18,9 +18,11 @@ namespace DMA {
static constexpr auto CD_OneBlock = Bit<uint16_t>(16);
};
struct __no_align SyncMode1 {
static constexpr auto BlockSize = BitRange<uint16_t>::from_to(0, 15);
static constexpr auto BlockAmount = BitRange<uint16_t>::from_to(16, 31);
struct __no_align SyncMode1 : public ComplexBitMap<uint32_t> {
__io_port_inherit_complex_bit_map(SyncMode1);
static constexpr auto BlockSize = BitRange<uint32_t>::from_to(0, 15);
static constexpr auto BlockAmount = BitRange<uint32_t>::from_to(16, 31);
};
struct __no_align SyncMode2 {
@@ -83,9 +85,9 @@ namespace DMA {
};
struct __no_align Registers {
MADR adr;
BCR block_ctrl;
CHCHR channel_ctrl;
IOPort<MADR> adr;
IOPort<BCR> block_ctrl;
IOPort<CHCHR> channel_ctrl;
};
//0: Highest, 7: Lowest
@@ -130,7 +132,7 @@ namespace DMA {
__declare_io_port_global(Registers, MDECin, 0x1F801080);
__declare_io_port_global(Registers, MDECout, 0x1F801090);
__declare_io_port_global(Registers, GPU, 0x1F8010A0);
__declare_io_port_global_struct(Registers, GPU, 0x1F8010A0);
__declare_io_port_global(Registers, CDROM, 0x1F8010B0);
__declare_io_port_global(Registers, SPU, 0x1F8010C0);
__declare_io_port_global(Registers, PIO, 0x1F8010D0);

View File

@@ -32,7 +32,7 @@ namespace GPU {
enum struct DMADirection {
Off = 0,
Unknown = 1,
Fifo = 1,
CPU2GPU = 2,
GPU2CPU = 3,
};
@@ -50,6 +50,10 @@ namespace GPU {
return ComplexBitMap{(0x02 << 24) | color.raw()};
}
static constexpr GP0 CPU2VRAM_Blitting() {
return ComplexBitMap{(0b101u << 29)};
}
static constexpr GP0 TopLeftPosition(uint16_t x, uint16_t y) {
return ComplexBitMap{static_cast<uint32_t>((y << 16u) | x)};
}
@@ -70,9 +74,17 @@ namespace GPU {
return ComplexBitMap{0};
}
static constexpr GP1 ResetCMDBufer() {
return ComplexBitMap{construct_cmd(0x01, 0)};
}
static constexpr GP1 SetDisplayState(DisplayState state) {
return ComplexBitMap{construct_cmd(0x03, static_cast<uint32_t>(state))};
}
static constexpr GP1 DMADirection(DMADirection dir) {
return ComplexBitMap{construct_cmd(0x04, static_cast<uint32_t>(dir))};
}
};
}

View File

@@ -20,6 +20,10 @@ public:
constexpr volatile T& ref() {
return const_cast<volatile IOPort<T>*>(this)->value;
}
constexpr const volatile T& ref() const {
return const_cast<volatile IOPort<T>*>(this)->value;
}
};
struct __no_align ubus32_t {
@@ -52,11 +56,15 @@ struct __no_align ubus32_t {
};
static constexpr uintptr_t IO_Base_Mask = 0xF0000000;
static constexpr uintptr_t IO_Base_Adr = 0x10000000;
#define __declare_io_port_global_raw(cv, type, name, adr) static __always_inline cv auto& name = *reinterpret_cast<IOPort<type>*>((IO_Base_Adr + (adr & ~IO_Base_Mask)))
#define __io_port_adr(adr) (IO_Base_Adr + (adr & ~IO_Base_Mask))
#define __declare_io_port_global_raw(cv, type, name, adr) static __always_inline cv auto& name = *reinterpret_cast<IOPort<type>*>(__io_port_adr(adr))
#define __declare_io_port_global(type, name, adr) __declare_io_port_global_raw(, type, name, adr)
#define __declare_io_port_global_const(type, name, adr) __declare_io_port_global_raw(const, type, name, adr)
#define __declare_io_port_global_array(type, name, adr, size) static __always_inline auto& name = reinterpret_cast<type(&)[size]>(*reinterpret_cast<type*>((IO_Base_Adr + (adr & ~IO_Base_Mask))));
#define __declare_io_port_global_array(type, name, adr, size) static __always_inline auto& name = reinterpret_cast<type(&)[size]>(*reinterpret_cast<type*>((IO_Base_Adr + (adr & ~IO_Base_Mask))))
#define __declare_io_port_global_struct(type, name, adr) static __always_inline auto& name = *reinterpret_cast<type*>(__io_port_adr(adr))
#define __io_port_inherit_complex_bit_map(name) \
constexpr __always_inline name() = default; \
constexpr __always_inline name(ComplexBitMap value) : ComplexBitMap(value) { \