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Improved names again

This commit is contained in:
jaby 2023-01-15 20:16:20 +01:00
parent 0476eb7c99
commit 3687fda821
5 changed files with 63 additions and 57 deletions
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22
include/PSX/System/IOPorts/cd_io.hpp
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@ -34,15 +34,15 @@ namespace JabyEngine {
};
struct Interrupt {
static void enable_all(IOPortEx<InterruptEnable>& port) {
static void enable_all(VolatileBitMapPOD<InterruptEnable>& port) {
port.write({InterruptEnable::with(InterruptEnable::InterruptTypValue.max(), InterruptEnable::UnknownIRQ, InterruptEnable::CommandStartIRQ)});
}
static uint8_t get_type(const IOPortEx<InterruptFlag>& port) {
static uint8_t get_type(const VolatileBitMapPOD<InterruptFlag>& port) {
return port.read().get_value(InterruptFlag::InterruptTypValue);
}
static void ack(IOPortEx<InterruptFlag>& port) {
static void ack(VolatileBitMapPOD<InterruptFlag>& port) {
port.write_range_value(InterruptFlag::InterruptTypValue.max());
}
};
@ -57,22 +57,22 @@ namespace JabyEngine {
struct __no_align IndexTriplet {
// Replace with proper types later
union __no_align {
const IOPort<uint8_t, ResponseFifo> response_fifo;
IOPort<uint8_t, CommandFifo> command;
const VolatilePOD<ResponseFifo> response_fifo;
VolatilePOD<CommandFifo> command;
};
union __no_align {
const IOPort<uint8_t, DataFifo> data_fifo;
IOPort<uint8_t, ParameterFifo> parameter_fifo;
const VolatilePOD<DataFifo> data_fifo;
VolatilePOD<ParameterFifo> parameter_fifo;
};
union __no_align {
const IOPort<InterruptEnable::UnderlyingType, InterruptEnable> irq_enable;
IOPort<Request::UnderlyingType, Request> request;
const VolatileBitMapPOD<InterruptEnable> irq_enable;
VolatileBitMapPOD<Request> request;
};
const IOPort<uint16_t, DataFifo16>& get_data_fifo_16() const {
return *reinterpret_cast<const IOPort<uint16_t, DataFifo16>*>(&this->data_fifo);
const VolatilePOD<DataFifo16>& get_data_fifo_16() const {
return *reinterpret_cast<const VolatilePOD<DataFifo16>*>(&this->data_fifo);
}
};

6
include/PSX/System/IOPorts/dma_io.hpp
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@ -77,9 +77,9 @@ namespace JabyEngine {
};
struct __no_align Registers {
IOPortEx<MADR> adr;
IOPortEx<BCR> block_ctrl;
IOPortEx<CHCHR> channel_ctrl;
VolatileBitMapPOD<MADR> adr;
VolatileBitMapPOD<BCR> block_ctrl;
VolatileBitMapPOD<CHCHR> channel_ctrl;
};
//0: Highest, 7: Lowest

70
include/PSX/System/IOPorts/ioport.hpp
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@ -3,50 +3,56 @@
#include "../../Auxiliary/complex_bitmap.hpp"
namespace JabyEngine {
template<typename T, typename S = T>
class __no_align IOPort {
private:
volatile T value;
template<typename T>
struct VolatilePOD {
volatile T raw;
public:
constexpr T read_raw() const {
return this->value;
constexpr T read() const {
return this->raw;
}
constexpr S read() const {
return S{this->value};
}
constexpr void write_raw(T value) {
this->value = value;
}
constexpr void write(const S& value) {
this->value = static_cast<T>(value);
constexpr void write(T value) {
this->raw = value;
}
};
// For use with ComplexBitMaps or what else satisfies this API
template<typename T>
class __no_align IOPortEx : public IOPort<typename T::UnderlyingType, T> {
private:
struct VolatileBitMapPOD {
typedef typename T::UnderlyingType Raw;
public:
VolatilePOD<Raw> pod;
constexpr Raw read_raw() const {
return this->pod.read();
}
constexpr T read() const {
return T{this->pod.read()};
}
constexpr Raw read_range_value(const BitRange<Raw>& range) const {
return IOPort<Raw, T>::read().get_value(range);
return VolatileBitMapPOD<T>::read().get_value(range);
}
constexpr void write_raw(Raw value) {
this->pod.write(value);
}
constexpr void write(const T& value) {
this->pod.write(static_cast<Raw>(value));
}
constexpr void write_range_value(const BitRangeValue<Raw>& value) {
IOPort<Raw, T>::write(T{T::with(value)});
VolatileBitMapPOD<T>::write(T{T::with(value)});
}
};
struct __no_align ubus32_t {
typedef ComplexBitMap<uint16_t> Base16;
IOPort<Base16::UnderlyingType, Base16> low;
IOPort<Base16::UnderlyingType, Base16> high;
VolatileBitMapPOD<Base16> low;
VolatileBitMapPOD<Base16> high;
constexpr ubus32_t(uint32_t value) {
*this = value;
@ -74,15 +80,15 @@ namespace JabyEngine {
#define __cast_io_adr_with_type(cv, type, name, adr) static __always_inline cv auto& name = *reinterpret_cast<type*>(__io_port_adr(adr))
#define __declare_io_port_global(type, name, adr) __cast_io_adr_with_type(, IOPortEx<type>, name, adr)
#define __declare_io_port_global_const(type, name, adr) __cast_io_adr_with_type(const, IOPortEx<type>, name, adr)
#define __declare_io_port_global_simple(type, name, adr) __cast_io_adr_with_type(, IOPort<type>, name, adr)
#define __declare_io_port_global_const_simple(type, name, adr) __cast_io_adr_with_type(const, IOPort<type>, name, adr)
#define __declare_io_port_global(type, name, adr) __cast_io_adr_with_type(, VolatileBitMapPOD<type>, name, adr)
#define __declare_io_port_global_const(type, name, adr) __cast_io_adr_with_type(const, VolatileBitMapPOD<type>, name, adr)
#define __declare_io_port_global_simple(type, name, adr) __cast_io_adr_with_type(, VolatilePOD<type>, name, adr)
#define __declare_io_port_global_const_simple(type, name, adr) __cast_io_adr_with_type(const, VolatilePOD<type>, name, adr)
#define __declare_io_port_member(type, name, adr) __cast_io_adr_with_type(inline, IOPortEx<type>, name, adr)
#define __declare_io_port_member_const(type, name, adr) __cast_io_adr_with_type(const inline, IOPortEx<type>, name, adr)
#define __declare_io_port_member_simple(type, name, adr) __cast_io_adr_with_type(inline, IOPort<type>, name, adr)
#define __declare_io_port_member_const_simple(type, name, adr) __cast_io_adr_with_type(const inline, IOPort<type>, name, adr)
#define __declare_io_port_member(type, name, adr) __cast_io_adr_with_type(inline, VolatileBitMapPOD<type>, name, adr)
#define __declare_io_port_member_const(type, name, adr) __cast_io_adr_with_type(const inline, VolatileBitMapPOD<type>, name, adr)
#define __declare_io_port_member_simple(type, name, adr) __cast_io_adr_with_type(inline, VolatilePOD<type>, name, adr)
#define __declare_io_port_member_const_simple(type, name, adr) __cast_io_adr_with_type(const inline, VolatilePOD<type>, name, adr)
#define __declare_io_port_global_array(type, name, adr, size) static __always_inline auto& name = reinterpret_cast<type(&)[size]>(*reinterpret_cast<type*>(__io_port_adr(adr)))
#define __declare_io_port_global_struct(type, name, adr) static __always_inline auto& name = *reinterpret_cast<type*>(__io_port_adr(adr))

16
include/PSX/System/IOPorts/spu_io.hpp
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@ -68,14 +68,14 @@ namespace JabyEngine {
};
struct __no_align Voice {
IOPort<SweepVolume::UnderlyingType, SweepVolume> volumeLeft; //Offset: 0x0
IOPort<SweepVolume::UnderlyingType, SweepVolume> volumeRight; //Offset: 0x2
IOPort<SampleRate::UnderlyingType, SampleRate> sampleRate; //Offset: 0x4;
IOPort<uint16_t, uint16_t> adr; //Offset: 0x6
IOPort<AD::UnderlyingType, AD> ad; //Offset: 0x8
IOPort<SR::UnderlyingType, SR> sr; //Offset: 0xA
IOPort<SimpleVolume, SimpleVolume> currentVolume; //Offset: 0xC
IOPort<uint16_t, uint16_t> repeatAdr; //Offset: 0xE
VolatileBitMapPOD<SweepVolume> volumeLeft; //Offset: 0x0
VolatileBitMapPOD<SweepVolume> volumeRight; //Offset: 0x2
VolatileBitMapPOD<SampleRate> sampleRate; //Offset: 0x4;
VolatilePOD<uint16_t> adr; //Offset: 0x6
VolatileBitMapPOD<AD> ad; //Offset: 0x8
VolatileBitMapPOD<SR> sr; //Offset: 0xA
VolatilePOD<SimpleVolume> currentVolume; //Offset: 0xC
VolatilePOD<uint16_t> repeatAdr; //Offset: 0xE
};
struct ControlRegister : public ComplexBitMap<uint16_t> {

6
include/PSX/System/IOPorts/timer_io.hpp
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@ -30,9 +30,9 @@ namespace JabyEngine {
};
struct __no_align Counter {
IOPortEx<CounterValue> value;
IOPortEx<CounterMode> mode;
IOPortEx<CounterTarget> target;
VolatileBitMapPOD<CounterValue> value;
VolatileBitMapPOD<CounterMode> mode;
VolatileBitMapPOD<CounterTarget> target;
private:
uint32_t _unused;
};