Add new IOPort design

This commit is contained in:
2023-01-15 16:49:38 +01:00
parent 509c25dfec
commit 3da34d0686
15 changed files with 143 additions and 240 deletions

View File

@@ -11,9 +11,7 @@ namespace JabyEngine {
Index3 = 3,
};
struct __no_align IndexStatus : public ComplexBitMap<uint8_t> {
__io_port_inherit_complex_bit_map(IndexStatus);
typedef struct IndexStatus : public ComplexBitMap<uint8_t> {
static constexpr auto PortIndex = BitRange<Index>::from_to(0, 1);
static constexpr auto HasXAFifoData = Bit<uint8_t>(2);
static constexpr auto IsParameterFifoEmpty = Bit<uint8_t>(3);
@@ -21,20 +19,16 @@ namespace JabyEngine {
static constexpr auto HasResponseFifoData = Bit<uint8_t>(5);
static constexpr auto HasDataFifoData = Bit<uint8_t>(6);
static constexpr auto IsTransmissionBusy = Bit<uint8_t>(7);
};
struct __no_align InterruptEnable : public ComplexBitMap<uint8_t> {
__io_port_inherit_complex_bit_map(InterruptEnable);
} IndexStatus_t;
struct InterruptEnable : public ComplexBitMap<uint8_t> {
static constexpr auto InterruptTypValue = BitRange<uint8_t>::from_to(0, 2);
static constexpr auto UnknownIRQ = Bit<uint8_t>(3);
static constexpr auto CommandStartIRQ = Bit<uint8_t>(4);
};
typedef InterruptEnable InterruptFlag;
struct __no_align Request : public ComplexBitMap<uint8_t> {
__io_port_inherit_complex_bit_map(Request);
struct Request : public ComplexBitMap<uint8_t> {
static constexpr auto WantCommandStartIRQ = Bit<uint8_t>(5);
static constexpr auto WantData = Bit<uint8_t>(7);
};
@@ -63,34 +57,34 @@ namespace JabyEngine {
struct __no_align IndexTriplet {
// Replace with proper types later
union __no_align {
const IOPort<ResponseFifo> response_fifo;
IOPort<CommandFifo> command;
const IOPort<uint8_t, ResponseFifo> response_fifo;
IOPort<uint8_t, CommandFifo> command;
};
union __no_align {
const IOPort<DataFifo> data_fifo;
IOPort<ParameterFifo> parameter_fifo;
const IOPort<uint8_t, DataFifo> data_fifo;
IOPort<uint8_t, ParameterFifo> parameter_fifo;
};
union __no_align {
const IOPort<InterruptEnable> irq_enable;
IOPort<Request> request;
const IOPort<InterruptEnable::UnderlyingType, InterruptEnable> irq_enable;
IOPort<Request::UnderlyingType, Request> request;
};
const IOPort<uint16_t>& get_data_fifo_16() const {
return *reinterpret_cast<const IOPort<uint16_t>*>(&this->data_fifo);
const IOPort<uint16_t, DataFifo16>& get_data_fifo_16() const {
return *reinterpret_cast<const IOPort<uint16_t, DataFifo16>*>(&this->data_fifo);
}
};
static_assert(sizeof(IndexTriplet) == 3);
}
__declare_io_port_global(struct IndexStatus, IndexStatus, 0x1F801800);
__declare_io_port_global(IndexStatus_t, IndexStatus, 0x1F801800);
namespace Helper {
template<typename S>
static S& change_to(Index idx) {
IndexStatus.write(ComplexBitMap(static_cast<uint8_t>(idx)));
IndexStatus.write({static_cast<uint8_t>(idx)});
return *reinterpret_cast<S*>(0x1F801801);
}
}