Add new IOPort design

This commit is contained in:
2023-01-15 16:49:38 +01:00
parent 509c25dfec
commit 3da34d0686
15 changed files with 143 additions and 240 deletions

View File

@@ -95,7 +95,7 @@ namespace JabyEngine {
}
static void set_src(uintptr_t adr) {
DMA_IO::GPU.adr.write(DMA_IO::MADR::MemoryAdr.with(static_cast<uint32_t>(adr)));
DMA_IO::GPU.adr.write_range_value(DMA_IO::MADR::MemoryAdr.with(static_cast<uint32_t>(adr)));
}
static void set_dst(const PositionU16& position, const SizeU16& size) {
@@ -108,7 +108,7 @@ namespace JabyEngine {
static void start(uint16_t blockCount, uint16_t wordsPerBlock = 0x10) {
typedef DMA_IO::BCR::SyncMode1 SyncMode1;
DMA_IO::GPU.block_ctrl.write(SyncMode1::with(SyncMode1::BlockSize.with(wordsPerBlock), SyncMode1::BlockAmount.with(blockCount)));
DMA_IO::GPU.block_ctrl.write(DMA_IO::BCR{SyncMode1::with(SyncMode1::BlockSize.with(wordsPerBlock), SyncMode1::BlockAmount.with(blockCount))});
DMA_IO::GPU.channel_ctrl.write(DMA_IO::CHCHR::StartGPUReceive());
}
}

View File

@@ -10,8 +10,8 @@ namespace JabyEngine {
static void clear_main_volume() {
static constexpr auto StartVol = SPU_IO::SweepVolume::with(SPU_IO::SweepVolume::VolumeEnable, SPU_IO::SweepVolume::Volume.with(I16_MAX >> 2));
SPU_IO::MainVolume::Left.write(StartVol);
SPU_IO::MainVolume::Right.write(StartVol);
SPU_IO::MainVolume::Left.write({StartVol});
SPU_IO::MainVolume::Right.write({StartVol});
}
static void clear_cd_and_ext_audio_volume() {
@@ -58,7 +58,7 @@ namespace JabyEngine {
static void setup_control_register() {
static constexpr auto SetupValue = SPU_IO::ControlRegister::with(SPU_IO::ControlRegister::Enable, SPU_IO::ControlRegister::Unmute, SPU_IO::ControlRegister::CDAudioEnable);
SPU_IO::Control.write(SetupValue);
SPU_IO::Control.write({SetupValue});
}
static void setup_data_transfer_control() {
@@ -79,7 +79,7 @@ namespace JabyEngine {
}
void stop_voices() {
SPU_IO::Key::Off.write(UI32_MAX);
SPU_IO::Key::Off.write({UI32_MAX});
}
void setup() {

View File

@@ -8,7 +8,7 @@ namespace JabyEngine {
namespace boot {
namespace Start {
static void enable_DMA() {
DMA_IO::DPCR.write(DMA_IO::DPCR.read() | DMA_IO::DMAControlRegister::SPUEnable | DMA_IO::DMAControlRegister::GPUEnable);
DMA_IO::DPCR.write(DMA_IO::DMAControlRegister{DMA_IO::DPCR.read() | DMA_IO::DMAControlRegister::SPUEnable | DMA_IO::DMAControlRegister::GPUEnable});
}
JabyEngine::NextRoutine setup() {

View File

@@ -26,8 +26,8 @@
__syscall_SysEnqIntRP(Timer2Irq, &IRQCallback);
__syscall_ExitCriticalSection();
Counter2.target.write(CounterTarget::CounterTargetValue.with(HighResTime::TicksFor10ms));
Counter2.mode.write(Mode);
Counter2.target.write_range_value(CounterTarget::CounterTargetValue.with(HighResTime::TicksFor10ms));
Counter2.mode.write({Mode});
Interrupt::enable_irq(Interrupt::Timer2);
}

View File

@@ -1,49 +1,8 @@
#include "../../include/CD/cd_internal.hpp"
#include <PSX/Auxiliary/complex_bitmap.hpp>
namespace JabyEngine {
namespace CD {
template<typename T, typename S = T>
class IOPortX {
private:
volatile T value;
public:
constexpr T read_raw() const {
return this->value;
}
constexpr S read() const {
return S{this->value};
}
constexpr void write_raw(T value) {
this->value = value;
}
constexpr void write(const S& value) {
this->value = static_cast<T>(value);
}
};
struct __no_align Wuff : public ComplexBitMap<uint32_t> {
static constexpr auto Miau = Bit<uint32_t>(0);
static constexpr auto Blubb = BitRange<uint32_t>::from_to(0, 5);
};
static __always_inline auto& Wuff = *reinterpret_cast<IOPortX<uint32_t, struct Wuff>*>(0x1F80000);
static uint32_t read(const IOPortX<uint32_t, struct Wuff>& port) {
return port.read().get_value(Wuff::Blubb);
}
namespace internal {
void setup() {
while(Wuff.read().is_bit_set(Wuff::Miau));
Wuff.write({Wuff::with(Wuff::Miau)});
}
}
}
}