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Port DMA code

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This commit is contained in:
jaby
2023-03-20 21:04:01 +01:00
parent 9243a3a17f
commit 44685184f8
4 changed files with 92 additions and 74 deletions
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10
src/Library/include/GPU/gpu_internal.hpp
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@@ -48,7 +48,7 @@ namespace JabyEngine {
namespace DMA {
static void wait() {
while(::JabyEngine::DMA_IO::GPU.channel_ctrl.read().is(::JabyEngine::DMA_IO::CHCHR::Busy));
::JabyEngine::DMA_IO::GPU.wait();
}
static void end() {
@@ -62,7 +62,7 @@ namespace JabyEngine {
}
static void set_src(uintptr_t adr) {
DMA_IO::GPU.adr.write(DMA_IO::MADR::MemoryAdr.with(static_cast<uint32_t>(adr)));
DMA_IO::GPU.set_adr(adr);
}
static void set_dst(const PositionU16& position, const SizeU16& size) {
@@ -73,10 +73,10 @@ namespace JabyEngine {
}
static void start(uint16_t blockCount, uint16_t wordsPerBlock = 0x10) {
typedef DMA_IO::BCR::SyncMode1 SyncMode1;
typedef DMA_IO::BCR_t::SyncMode1 SyncMode1;
DMA_IO::GPU.block_ctrl.write(DMA_IO::BCR{SyncMode1::with(SyncMode1::BlockSize.with(wordsPerBlock), SyncMode1::BlockAmount.with(blockCount))});
DMA_IO::GPU.channel_ctrl.write(DMA_IO::CHCHR::StartGPUReceive());
DMA_IO::GPU.block_ctrl = *DMA_IO::BCR_t::from(SyncMode1::BlockSize.with(wordsPerBlock), SyncMode1::BlockAmount.with(blockCount));
DMA_IO::GPU.channel_ctrl = *DMA_IO::CHCHR_t::StartGPUReceive();
}
}
}

4
src/Library/src/BootLoader/start_boot.cpp
View File

@@ -1,6 +1,7 @@
#include "BootLoader/boot_loader.hpp"
#include <PSX/System/IOPorts/dMa_io.hpp>
// 2x For setup timing
#include <PSX/Timer/high_res_timer.hpp>
#include <stdio.h>
@@ -8,7 +9,8 @@ namespace JabyEngine {
namespace boot {
namespace Start {
static void enable_DMA() {
DMA_IO::DPCR.write(DMA_IO::DMAControlRegister{DMA_IO::DPCR.read() | DMA_IO::DMAControlRegister::SPUEnable | DMA_IO::DMAControlRegister::GPUEnable});
const auto dpcr = DMA_IO::DPCR_t(*DMA_IO::DPCR).set(DMA_IO::DPCR_t::SPUEnable).set(DMA_IO::DPCR_t::GPUEnable);
DMA_IO::DPCR = *dpcr;
}
JabyEngine::NextRoutine setup() {