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Convert Interrupts

This commit is contained in:
Jaby 2023-09-17 22:25:54 +02:00 committed by Jaby
parent f9a9c6a544
commit 4f462376f2
2 changed files with 11 additions and 11 deletions
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20
include/PSX/System/IOPorts/interrupt_io.hpp
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@ -17,29 +17,29 @@ namespace JabyEngine {
static constexpr auto Controller = Bit(10); static constexpr auto Controller = Bit(10);
static constexpr auto LightPen = Controller; static constexpr auto LightPen = Controller;
__declare_io_type(Status, uint32_t, __new_declare_io_value(Status, uint32_t) {
); };
__declare_io_type(Mask, uint32_t, __new_declare_io_value(Mask, uint32_t) {
); };
__declare_new_io_port(Status, 0x1F801070); __new_declare_io_port(inline, Status, 0x1F801070);
__declare_new_io_port(Mask, 0x1F801074); __new_declare_io_port(inline, Mask, 0x1F801074);
static bool is_irq(Bit irq) { static bool is_irq(Bit irq) {
return Status.is_set(irq); return Status.read().is_set2(irq);
} }
static void ack_irq(Bit irq) { static void ack_irq(Bit irq) {
Status.clear(irq); Status.write(Status.read().clear2(irq));
} }
static void disable_irq(Bit irq) { static void disable_irq(Bit irq) {
Mask.clear(irq); Mask.write(Mask.read().clear2(irq));
} }
static void enable_irq(Bit irq) { static void enable_irq(Bit irq) {
Mask.set(irq); Mask.write(Mask.read().set2(irq));
} }
}; };
} }

2
include/PSX/System/IOPorts/ioport.hpp
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@ -65,7 +65,7 @@ namespace JabyEngine {
constexpr T& clear2(Bit bit) { constexpr T& clear2(Bit bit) {
this->raw = bit::clear(this->raw, bit); this->raw = bit::clear(this->raw, bit);
return *this; return static_cast<T&>(*this);
} }
constexpr bool is_set2(Bit bit) const { constexpr bool is_set2(Bit bit) const {