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Improve IOPort code

This commit is contained in:
Jaby 2022-09-05 20:58:33 +02:00 committed by Jaby
parent d7f4f45e3a
commit 5574addb29
4 changed files with 106 additions and 78 deletions
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20
include/PSX/System/IOPorts/DMA_IO.hpp
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@ -3,14 +3,14 @@
#include "IOPort.hpp" #include "IOPort.hpp"
namespace DMA { namespace DMA {
struct __no_align MADR : public IOPort<uint32_t> { struct __no_align MADR : public ComplexBitMap<uint32_t> {
__io_port_inherit(MADR); __io_port_inherit_complex_bit_map(MADR);
static constexpr BitRange<uint32_t> MemoryAdr = BitRange<uint32_t>::from_to(0, 23); static constexpr BitRange<uint32_t> MemoryAdr = BitRange<uint32_t>::from_to(0, 23);
}; };
struct __no_align BCR : public IOPort<uint32_t> { struct __no_align BCR : public ComplexBitMap<uint32_t> {
__io_port_inherit(BCR); __io_port_inherit_complex_bit_map(BCR);
struct __no_align SyncMode0 { struct __no_align SyncMode0 {
static constexpr BitRange<uint16_t> NumberOfWords = BitRange<uint16_t>::from_to(0, 15); static constexpr BitRange<uint16_t> NumberOfWords = BitRange<uint16_t>::from_to(0, 15);
@ -26,8 +26,8 @@ namespace DMA {
}; };
}; };
struct __no_align CHCHR : public IOPort<uint32_t> { struct __no_align CHCHR : public ComplexBitMap<uint32_t> {
__io_port_inherit(CHCHR); __io_port_inherit_complex_bit_map(CHCHR);
enum _SyncMode { enum _SyncMode {
Sync0 = 0, //Start immediately, Sync0 = 0, //Start immediately,
@ -92,8 +92,8 @@ namespace DMA {
static constexpr Priority HighestPriority = 0; static constexpr Priority HighestPriority = 0;
static constexpr Priority LowestPriority = 7; static constexpr Priority LowestPriority = 7;
struct __no_align DMAControlRegister : public IOPort<uint32_t> { struct __no_align DMAControlRegister : public ComplexBitMap<uint32_t> {
__io_port_inherit(DMAControlRegister); __io_port_inherit_complex_bit_map(DMAControlRegister);
static constexpr Bit<uint32_t> OTCEnable = 27; static constexpr Bit<uint32_t> OTCEnable = 27;
static constexpr BitRange<Priority> OTCPriority = BitRange<Priority>::from_to(24, 26); static constexpr BitRange<Priority> OTCPriority = BitRange<Priority>::from_to(24, 26);
@ -117,8 +117,8 @@ namespace DMA {
static constexpr BitRange<Priority> MDECinPriority = BitRange<Priority>::from_to(0, 2); static constexpr BitRange<Priority> MDECinPriority = BitRange<Priority>::from_to(0, 2);
}; };
struct __no_align DMAInterruptRegister : public IOPort<uint32_t> { struct __no_align DMAInterruptRegister : public ComplexBitMap<uint32_t> {
__io_port_inherit(DMAInterruptRegister); __io_port_inherit_complex_bit_map(DMAInterruptRegister);
static constexpr Bit<uint32_t> MasterEnable = 31; static constexpr Bit<uint32_t> MasterEnable = 31;
static constexpr BitRange<uint32_t> Flags = BitRange<uint32_t>::from_to(24, 30); static constexpr BitRange<uint32_t> Flags = BitRange<uint32_t>::from_to(24, 30);

119
include/PSX/System/IOPorts/IOPort.hpp
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@ -54,18 +54,18 @@ static constexpr __always_inline BitRangeValue<T> operator<<(const BitRange<T>&
} }
template<typename T> template<typename T>
class __no_align IOPort { class __no_align ComplexBitMap {
private: private:
T value = 0; T value = 0;
public: public:
constexpr IOPort() = default; constexpr ComplexBitMap() = default;
constexpr IOPort(T value) : value(value) { constexpr ComplexBitMap(T value) : value(value) {
} }
//Accesssing bits //Accesssing bits
template<typename S> template<typename S>
constexpr IOPort<T>& set_bit(S bit) { constexpr ComplexBitMap<T>& set_bit(S bit) {
this->value = bit::set(this->value, static_cast<size_t>(bit)); this->value = bit::set(this->value, static_cast<size_t>(bit));
return *this; return *this;
} }
@ -76,7 +76,7 @@ public:
} }
template<typename S> template<typename S>
constexpr IOPort<T>& clear_bit(S bit) { constexpr ComplexBitMap<T>& clear_bit(S bit) {
this->value = bit::clear(this->value, static_cast<size_t>(bit)); this->value = bit::clear(this->value, static_cast<size_t>(bit));
return *this; return *this;
} }
@ -98,7 +98,7 @@ public:
//Accessing values //Accessing values
template<typename S> template<typename S>
constexpr IOPort<T>& set_value(S value, const BitRange<S>& range) { constexpr ComplexBitMap<T>& set_value(S value, const BitRange<S>& range) {
this->value = bit::value::set_normalized(this->value, static_cast<T>(value), range.begin, range.length); this->value = bit::value::set_normalized(this->value, static_cast<T>(value), range.begin, range.length);
return *this; return *this;
} }
@ -109,7 +109,7 @@ public:
} }
template<typename S> template<typename S>
constexpr IOPort<T>& clear_value(const BitRange<S>& range) { constexpr ComplexBitMap<T>& clear_value(const BitRange<S>& range) {
this->value = bit::value::clear_normalized(this->value, range.begin, range.length); this->value = bit::value::clear_normalized(this->value, range.begin, range.length);
return *this; return *this;
} }
@ -129,6 +129,67 @@ public:
return static_cast<S>(bit::value::get_normalized(this->value, range.begin, range.length)); return static_cast<S>(bit::value::get_normalized(this->value, range.begin, range.length));
} }
// For easier constructing
constexpr ComplexBitMap<T>& set(const BitRange<T>& range, T value) {
this->set_value(value, range);
return *this;
}
constexpr ComplexBitMap<T>& set(const BitRangeValue<T>& value) {
this->set_value(value.value, value.range);
return *this;
}
constexpr ComplexBitMap<T>& set(const Bit<T>& bit) {
this->set_bit(bit.value);
return *this;
}
constexpr ComplexBitMap<T>& set(const ClearBitValue& value) {
this->clear_bit(value.bit);
return *this;
}
constexpr ComplexBitMap<T>& operator|(const BitRangeValue<T>& value) {
this->set_value(value.value, value.range);
return *this;
}
constexpr ComplexBitMap<T>& operator|(const Bit<T>& bit) {
this->set_bit(bit.value);
return *this;
}
constexpr ComplexBitMap<T>& operator|(const ClearBitValue& value) {
this->clear_bit(value.bit);
return *this;
}
//For raw access
constexpr operator T() const {
return this->value;
}
constexpr operator T() const volatile {
return this->value;
}
constexpr ComplexBitMap<T>& operator=(T value) {
this->value = value;
return *this;
}
constexpr void operator=(T value) volatile {
this->value = value;
}
};
template<typename T>
class __no_align IOPort {
private:
T value;
public:
//For easy access //For easy access
constexpr T read() const { constexpr T read() const {
return const_cast<volatile IOPort<T>*>(this)->value; return const_cast<volatile IOPort<T>*>(this)->value;
@ -141,45 +202,11 @@ public:
constexpr volatile T& ref() { constexpr volatile T& ref() {
return const_cast<volatile IOPort<T>*>(this)->value; return const_cast<volatile IOPort<T>*>(this)->value;
} }
//For raw access
constexpr operator T() const {
return this->value;
}
constexpr operator T() const volatile {
return this->value;
}
constexpr IOPort<T>& operator=(T value) {
this->value = value;
return *this;
}
constexpr void operator=(T value) volatile {
this->value = value;
}
// For easier constructing
constexpr IOPort<T>& operator|(const BitRangeValue<T>& value) {
this->set_value(value.value, value.range);
return *this;
}
constexpr IOPort<T>& operator|(const Bit<T>& bit) {
this->set_bit(bit.value);
return *this;
}
constexpr IOPort<T>& operator|(const ClearBitValue& value) {
this->clear_bit(value.bit);
return *this;
}
}; };
struct __no_align ubus32_t { struct __no_align ubus32_t {
IOPort<uint16_t> low; ComplexBitMap<uint16_t> low;
IOPort<uint16_t> high; ComplexBitMap<uint16_t> high;
constexpr ubus32_t(uint32_t value) { constexpr ubus32_t(uint32_t value) {
*this = value; *this = value;
@ -210,10 +237,10 @@ static constexpr uintptr_t IO_Base_Adr = 0x10000000;
#define __declare_io_port_global(type, name, adr) static __always_inline auto& name = *reinterpret_cast<IOPort<type>*>((IO_Base_Adr + (adr & ~IO_Base_Mask))) #define __declare_io_port_global(type, name, adr) static __always_inline auto& name = *reinterpret_cast<IOPort<type>*>((IO_Base_Adr + (adr & ~IO_Base_Mask)))
#define __declare_io_port_global_array(type, name, adr, size) static __always_inline auto& name = reinterpret_cast<type(&)[size]>(*reinterpret_cast<type*>((IO_Base_Adr + (adr & ~IO_Base_Mask)))); #define __declare_io_port_global_array(type, name, adr, size) static __always_inline auto& name = reinterpret_cast<type(&)[size]>(*reinterpret_cast<type*>((IO_Base_Adr + (adr & ~IO_Base_Mask))));
#define __io_port_inherit(name) \ #define __io_port_inherit_complex_bit_map(name) \
using IOPort::operator=; \ using ComplexBitMap::operator=; \
constexpr name() = default; \ constexpr name() = default; \
constexpr name(IOPort value) : IOPort(value) { \ constexpr name(ComplexBitMap value) : ComplexBitMap(value) { \
} }
#endif //!__JABYENGINE_IOPORT_HPP__ #endif //!__JABYENGINE_IOPORT_HPP__

40
include/PSX/System/IOPorts/SPU_IO.hpp
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@ -26,19 +26,19 @@ namespace SPU {
//0..3 = +7, +6, +5, +4 or -6, -7, -6, -5 //0..3 = +7, +6, +5, +4 or -6, -7, -6, -5
typedef uint8_t Step; typedef uint8_t Step;
struct __no_align SampleRate : public IOPort<uint16_t> { struct __no_align SampleRate : public ComplexBitMap<uint16_t> {
__io_port_inherit(SampleRate); __io_port_inherit_complex_bit_map(SampleRate);
static constexpr SampleRate from_HZ(double freq) { static constexpr SampleRate from_HZ(double freq) {
//4096 == 44100Hz //4096 == 44100Hz
constexpr double Base = (4096.0 / 44100.0); constexpr double Base = (4096.0 / 44100.0);
return IOPort(static_cast<uint16_t>((freq*Base))); return ComplexBitMap(static_cast<uint16_t>((freq*Base)));
} }
}; };
struct __no_align SweepVolume : public IOPort<int16_t> { struct __no_align SweepVolume : public ComplexBitMap<int16_t> {
__io_port_inherit(SweepVolume); __io_port_inherit_complex_bit_map(SweepVolume);
// For Volume Mode // For Volume Mode
static constexpr Bit<int16_t> SweepEnable = 15; // 0 Volume Mode; 1 Sweep Mode static constexpr Bit<int16_t> SweepEnable = 15; // 0 Volume Mode; 1 Sweep Mode
@ -52,8 +52,8 @@ namespace SPU {
static constexpr BitRange<Step> SweepStep = BitRange<Step>::from_to(0, 1); static constexpr BitRange<Step> SweepStep = BitRange<Step>::from_to(0, 1);
}; };
struct __no_align SR : public IOPort<uint16_t> { struct __no_align SR : public ComplexBitMap<uint16_t> {
__io_port_inherit(SR); __io_port_inherit_complex_bit_map(SR);
static constexpr Bit<Mode> SustainMode = (31 - 16); static constexpr Bit<Mode> SustainMode = (31 - 16);
static constexpr Bit<Direction> SustainDirection = (30 - 16); static constexpr Bit<Direction> SustainDirection = (30 - 16);
@ -63,8 +63,8 @@ namespace SPU {
static constexpr BitRange<Shift> ReleaseShift = BitRange<Shift>::from_to((16 - 16), (20 - 16)); static constexpr BitRange<Shift> ReleaseShift = BitRange<Shift>::from_to((16 - 16), (20 - 16));
}; };
struct __no_align AD : public IOPort<uint16_t> { struct __no_align AD : public ComplexBitMap<uint16_t> {
__io_port_inherit(AD); __io_port_inherit_complex_bit_map(AD);
static constexpr Bit<Mode> AttackMode = 15; static constexpr Bit<Mode> AttackMode = 15;
static constexpr BitRange<Shift> AttackShift = BitRange<Shift>::from_to(10, 14); static constexpr BitRange<Shift> AttackShift = BitRange<Shift>::from_to(10, 14);
@ -74,9 +74,9 @@ namespace SPU {
}; };
struct __no_align Voice { struct __no_align Voice {
SweepVolume volumeLeft; //Offset: 0x0 IOPort<SweepVolume> volumeLeft; //Offset: 0x0
SweepVolume volumeRight; //Offset: 0x2 IOPort<SweepVolume> volumeRight; //Offset: 0x2
SampleRate sampleRate; //Offset: 0x4; IOPort<SampleRate> sampleRate; //Offset: 0x4;
IOPort<uint16_t> adr; //Offset: 0x6 IOPort<uint16_t> adr; //Offset: 0x6
IOPort<AD> ad; //Offset: 0x8 IOPort<AD> ad; //Offset: 0x8
IOPort<SR> sr; //Offset: 0xA IOPort<SR> sr; //Offset: 0xA
@ -84,8 +84,8 @@ namespace SPU {
IOPort<uint16_t> repeatAdr; //Offset: 0xE IOPort<uint16_t> repeatAdr; //Offset: 0xE
}; };
struct __no_align ControlRegister : public IOPort<uint16_t> { struct __no_align ControlRegister : public ComplexBitMap<uint16_t> {
__io_port_inherit(ControlRegister); __io_port_inherit_complex_bit_map(ControlRegister);
enum RAMTransferMode { enum RAMTransferMode {
Stop = 0, Stop = 0,
@ -107,20 +107,20 @@ namespace SPU {
static constexpr Bit<uint16_t> CDAudioEnable = 0; static constexpr Bit<uint16_t> CDAudioEnable = 0;
}; };
struct __no_align PitchModFlags : public IOPort<uint16_t> { struct __no_align PitchModFlags : public ComplexBitMap<uint16_t> {
__io_port_inherit(PitchModFlags); __io_port_inherit_complex_bit_map(PitchModFlags);
static constexpr BitRange<uint16_t> EnableBits = BitRange<uint16_t>::from_to(1, 23); static constexpr BitRange<uint16_t> EnableBits = BitRange<uint16_t>::from_to(1, 23);
}; };
struct __no_align NoiseGenerator : public IOPort<uint16_t> { struct __no_align NoiseGenerator : public ComplexBitMap<uint16_t> {
__io_port_inherit(NoiseGenerator); __io_port_inherit_complex_bit_map(NoiseGenerator);
static constexpr BitRange<uint16_t> NoiseBits = BitRange<uint16_t>::from_to(0, 23); static constexpr BitRange<uint16_t> NoiseBits = BitRange<uint16_t>::from_to(0, 23);
}; };
struct __no_align EchoOn : public IOPort<uint16_t> { struct __no_align EchoOn : public ComplexBitMap<uint16_t> {
__io_port_inherit(EchoOn); __io_port_inherit_complex_bit_map(EchoOn);
static constexpr BitRange<uint16_t> EchoBits = BitRange<uint16_t>::from_to(0, 23); static constexpr BitRange<uint16_t> EchoBits = BitRange<uint16_t>::from_to(0, 23);
}; };

5
src/Library/src/BootLoader/boot_spu.cpp
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@ -10,7 +10,7 @@ namespace SPU {
} }
static void clear_main_volume() { static void clear_main_volume() {
static constexpr auto StartVol = SweepVolume() | !SweepVolume::SweepEnable | (SweepVolume::Volume << static_cast<int16_t>(I16_MAX >> 2)); static constexpr auto StartVol = SweepVolume().set(!SweepVolume::SweepEnable).set(SweepVolume::Volume, I16_MAX >> 2);
MainVolume::left.write(StartVol); MainVolume::left.write(StartVol);
MainVolume::right.write(StartVol); MainVolume::right.write(StartVol);
@ -58,7 +58,7 @@ namespace SPU {
} }
static void setup_control_register() { static void setup_control_register() {
static constexpr auto SetupValue = ControlRegister() | ControlRegister::Enable | ControlRegister::Unmute | ControlRegister::CDAudioEnable; static constexpr auto SetupValue = ControlRegister().set(ControlRegister::Enable).set(ControlRegister::Unmute).set(ControlRegister::CDAudioEnable);
Control.write(SetupValue); Control.write(SetupValue);
} }
@ -84,5 +84,6 @@ namespace SPU {
// Enable SPU DMA // Enable SPU DMA
DPCR.write(DPCR.read() | DMAControlRegister::SPUEnable); DPCR.write(DPCR.read() | DMAControlRegister::SPUEnable);
while(!DPCR.read().is_bit_set(DMAControlRegister::SPUEnable));
} }
} }