Improve struct and namespace usage
This commit is contained in:
parent
297526e4d0
commit
a791f0bffd
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@ -12,7 +12,7 @@
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namespace JabyEngine {
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namespace GPU {
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namespace Display {
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struct Display {
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#ifdef JABYENGINE_PAL
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static constexpr size_t Width = 320;
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static constexpr size_t Height = 256;
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@ -22,21 +22,19 @@ namespace JabyEngine {
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#endif
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static void enable() {
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GP1.write(Command::GP1::SetDisplayState(DisplayState::On));
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GPU_IO::GP1.write(GPU_IO::Command::GP1::SetDisplayState(GPU_IO::DisplayState::On));
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}
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static void disable() {
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GP1.write(Command::GP1::SetDisplayState(DisplayState::Off));
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GPU_IO::GP1.write(GPU_IO::Command::GP1::SetDisplayState(GPU_IO::DisplayState::Off));
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}
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}
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};
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namespace Screen {
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extern uint8_t CurrentDisplayAreaID;
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struct Screen {
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static uint8_t CurrentDisplayAreaID;
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namespace Range {
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void set_offset(uint16_t x, uint16_t y);
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}
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}
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static void set_offset(uint16_t x, uint16_t y);
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};
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}
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}
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#endif //!__JABYENGINE_GPU_HPP__
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@ -3,7 +3,7 @@
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#include "ioport.hpp"
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namespace JabyEngine {
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namespace DMA {
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namespace DMA_IO {
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struct __no_align MADR : public ComplexBitMap<uint32_t> {
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__io_port_inherit_complex_bit_map(MADR);
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@ -130,13 +130,13 @@ namespace JabyEngine {
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static constexpr auto ForceIRQ = Bit<uint32_t>(15);
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};
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__declare_io_port_global(Registers, MDECin, 0x1F801080);
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__declare_io_port_global(Registers, MDECout, 0x1F801090);
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__declare_io_port_global_struct(Registers, MDECin, 0x1F801080);
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__declare_io_port_global_struct(Registers, MDECout, 0x1F801090);
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__declare_io_port_global_struct(Registers, GPU, 0x1F8010A0);
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__declare_io_port_global(Registers, CDROM, 0x1F8010B0);
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__declare_io_port_global(Registers, SPU, 0x1F8010C0);
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__declare_io_port_global(Registers, PIO, 0x1F8010D0);
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__declare_io_port_global(Registers, OTC, 0x1F8010E0);
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__declare_io_port_global_struct(Registers, CDROM, 0x1F8010B0);
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__declare_io_port_global_struct(Registers, SPU, 0x1F8010C0);
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__declare_io_port_global_struct(Registers, PIO, 0x1F8010D0);
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__declare_io_port_global_struct(Registers, OTC, 0x1F8010E0);
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__declare_io_port_global(DMAControlRegister, DPCR, 0x1F8010F0);
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__declare_io_port_global(DMAInterruptRegister, DICR, 0x1F8010F4);
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@ -4,7 +4,7 @@
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#include "../../GPU/gpu_types.hpp"
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namespace JabyEngine {
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namespace GPU {
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namespace GPU_IO {
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enum struct SemiTransparency {
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B_Half_add_F_Half = 0,
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B_add_F = 1,
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@ -47,11 +47,11 @@ namespace JabyEngine {
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Off = 1
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};
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namespace Command {
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struct Command {
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struct __no_align GP0 : public ComplexBitMap<uint32_t> {
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__io_port_inherit_complex_bit_map(GP0);
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static constexpr GP0 QuickFill(Color24 color) {
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static constexpr GP0 QuickFill(GPU::Color24 color) {
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return ComplexBitMap{(0x02 << 24) | color.raw()};
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}
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@ -132,7 +132,7 @@ namespace JabyEngine {
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return ComplexBitMap{construct_cmd(0x08, mode)};
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}
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};
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}
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};
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struct __no_align GPUStatusRegister : public ComplexBitMap<uint32_t> {
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static constexpr auto DrawingOddLinesInterlaced = Bit<uint32_t>(31);
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@ -144,7 +144,7 @@ namespace JabyEngine {
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static constexpr auto InterruptRequest = Bit<uint32_t>(24);
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static constexpr auto DisplayDisabled = Bit<uint32_t>(23);
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static constexpr auto VerticalInterlaceOn = Bit<uint32_t>(22);
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static constexpr auto DisplayAreaColorDepth = BitRange<GPU::DisplayAreaColorDepth>::from_to(21, 21);
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static constexpr auto DisplayAreaColorDepth = BitRange<GPU_IO::DisplayAreaColorDepth>::from_to(21, 21);
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static constexpr auto VideoModePal = Bit<uint32_t>(20);
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static constexpr auto VerticalResolutionValue = BitRange<VerticalResolution>::from_to(19, 19);
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static constexpr auto HorizontalResolutionValue = BitRange<HorizontalResolution>::from_to(17, 18);
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@ -3,7 +3,7 @@
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#include "ioport.hpp"
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namespace JabyEngine {
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namespace Interrupt {
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struct Interrupt {
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static constexpr auto VBlank = Bit<uint32_t>(0);
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static constexpr auto GPU = Bit<uint32_t>(1);
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static constexpr auto CDROM = Bit<uint32_t>(2);
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@ -17,16 +17,16 @@ namespace JabyEngine {
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static constexpr auto Controller = Bit<uint32_t>(10);
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static constexpr auto LightPen = Controller;
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struct __no_align IRQStatus : public ComplexBitMap<uint32_t> {
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__io_port_inherit_complex_bit_map(IRQStatus);
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struct __no_align Status : public ComplexBitMap<uint32_t> {
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__io_port_inherit_complex_bit_map(Status);
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};
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struct __no_align IRQMask : public ComplexBitMap<uint32_t> {
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__io_port_inherit_complex_bit_map(IRQMask);
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struct __no_align Mask : public ComplexBitMap<uint32_t> {
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__io_port_inherit_complex_bit_map(Mask);
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};
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__declare_io_port_global(IRQStatus, Status, 0x1F801070);
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__declare_io_port_global(IRQMask, Mask, 0x1F801074);
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__declare_io_port_member(struct Status, Status, 0x1F801070);
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__declare_io_port_member(struct Mask, Mask, 0x1F801074);
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static bool is_irq(Bit<uint32_t> irq) {
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return Status.read().is_bit_set(irq);
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@ -43,7 +43,7 @@ namespace JabyEngine {
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static void enable_irq(Bit<uint32_t> irq) {
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Mask.write(Mask.read().set_bit(irq));
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}
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}
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};
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}
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#endif //!__JABYENGINE_INTERRUPT_IO_HPP__
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@ -69,6 +69,9 @@ namespace JabyEngine {
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#define __declare_io_port_global(type, name, adr) __declare_io_port_global_raw(, type, name, adr)
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#define __declare_io_port_global_const(type, name, adr) __declare_io_port_global_raw(const, type, name, adr)
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#define __declare_io_port_member(type, name, adr) __declare_io_port_global_raw(inline, type, name, adr)
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#define __declare_io_port_member_const(type, name, adr) __declare_io_port_global_raw(const inline, type, name, adr)
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#define __declare_io_port_global_array(type, name, adr, size) static __always_inline auto& name = reinterpret_cast<type(&)[size]>(*reinterpret_cast<type*>((IO_Base_Adr + (adr & ~IO_Base_Mask))))
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#define __declare_io_port_global_struct(type, name, adr) static __always_inline auto& name = *reinterpret_cast<type*>(__io_port_adr(adr))
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@ -3,7 +3,7 @@
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#include "ioport.hpp"
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namespace JabyEngine {
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namespace SPU {
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namespace SPU_IO {
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enum struct Mode {
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Linear = 0,
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Exponential = 1,
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@ -129,34 +129,34 @@ namespace JabyEngine {
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static constexpr size_t VoiceCount = 24;
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namespace Key {
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__declare_io_port_global(ubus32_t, on, 0x1F801D88);
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__declare_io_port_global(ubus32_t, off, 0x1F801D8C);
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__declare_io_port_global(ubus32_t, status, 0x1F801D9C);
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}
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struct Key {
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__declare_io_port_member(ubus32_t, On, 0x1F801D88);
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__declare_io_port_member(ubus32_t, Off, 0x1F801D8C);
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__declare_io_port_member(ubus32_t, Status, 0x1F801D9C);
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};
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namespace MainVolume {
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__declare_io_port_global(SweepVolume, left, 0x1F801D80);
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__declare_io_port_global(SweepVolume, right, 0x1F801D82);
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}
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struct MainVolume {
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__declare_io_port_member(SweepVolume, Left, 0x1F801D80);
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__declare_io_port_member(SweepVolume, Right, 0x1F801D82);
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};
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namespace CDVolume {
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__declare_io_port_global(SimpleVolume, left, 0x1F801DB0);
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__declare_io_port_global(SimpleVolume, right, 0x1F801DB2);
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}
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struct CDVolume {
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__declare_io_port_member(SimpleVolume, Left, 0x1F801DB0);
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__declare_io_port_member(SimpleVolume, Right, 0x1F801DB2);
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};
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namespace ExternalAudioInputVolume {
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__declare_io_port_global(SimpleVolume, left, 0x1F801DB4);
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__declare_io_port_global(SimpleVolume, right, 0x1F801DB6);
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}
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struct ExternalAudioInputVolume {
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__declare_io_port_member(SimpleVolume, Left, 0x1F801DB4);
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__declare_io_port_member(SimpleVolume, Right, 0x1F801DB6);
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};
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namespace Reverb {
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namespace Volume {
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__declare_io_port_global(SimpleVolume, left, 0x1F801D84);
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__declare_io_port_global(SimpleVolume, right, 0x1F801D86);
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}
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__declare_io_port_global(uint16_t, work_area_adr, 0x1F801DA2);
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}
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struct Reverb {
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struct Volume {
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__declare_io_port_member(SimpleVolume, Left, 0x1F801D84);
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__declare_io_port_member(SimpleVolume, Right, 0x1F801D86);
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};
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__declare_io_port_member(uint16_t, WorkAreaAdr, 0x1F801DA2);
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};
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__declare_io_port_global(ControlRegister, Control, 0x1F801DAA);
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__declare_io_port_global(uint16_t, DataTransferControl, 0x1F801DAC);
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__declare_io_port_global(NoiseGenerator, NON, 0x1F801D94);
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__declare_io_port_global(EchoOn, EON, 0x1F801D98);
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__declare_io_port_global_array(Voice, Voices, 0x1F801C00, VoiceCount);
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__declare_io_port_global_array(struct Voice, Voice, 0x1F801C00, VoiceCount);
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}
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}
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#endif //!__JABYENGINE_SPU_IO_HPP__
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@ -3,9 +3,7 @@
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#include "ioport.hpp"
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namespace JabyEngine {
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namespace Timer {
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enum struct SyncMode {};
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namespace Timer_IO {
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struct __no_align CounterMode : public ComplexBitMap<uint32_t> {
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__io_port_inherit_complex_bit_map(CounterMode);
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static constexpr auto CounterTargetValue = BitRange<uint32_t>::from_to(0, 15);
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};
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struct __no_align TimerInfo {
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struct __no_align Counter {
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IOPort<uint32_t> value;
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IOPort<CounterMode> mode;
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IOPort<CounterTarget> target;
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private:
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uint32_t _unused[1];
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uint32_t _unused;
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};
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static constexpr uintptr_t counter_base_adr(size_t ID) {
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return (0x1F801100 + (ID*0x10));
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}
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namespace Counter0 {
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struct __no_align Counter0 : public Counter {
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struct SyncMode {
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static constexpr auto Pause_During_Hblank = CounterMode::SyncMode.with(0);
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static constexpr auto Zero_At_Hblank = CounterMode::SyncMode.with(1);
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@ -57,11 +55,9 @@ namespace JabyEngine {
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static constexpr auto System_Clock_Too = CounterMode::ClockSource.with(2);
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static constexpr auto Dot_Clock_Too = CounterMode::ClockSource.with(3);
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};
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};
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__declare_io_port_global_struct(TimerInfo, Timer, counter_base_adr(0));
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}
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namespace Counter1 {
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struct __no_align Counter1 : public Counter {
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struct SyncMode {
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static constexpr auto Pause_During_Vblank = CounterMode::SyncMode.with(0);
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static constexpr auto Zero_At_Vblank = CounterMode::SyncMode.with(1);
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static constexpr auto System_Clock_Too = CounterMode::ClockSource.with(2);
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static constexpr auto Hblank_Too = CounterMode::ClockSource.with(3);
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};
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};
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__declare_io_port_global_struct(TimerInfo, Timer, counter_base_adr(1));
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}
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namespace Counter2 {
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struct __no_align Counter2 : public Counter {
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struct SyncMode {
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static constexpr auto Stop_Counter = CounterMode::SyncMode.with(0);
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static constexpr auto Freerun = CounterMode::SyncMode.with(1);
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@ -93,9 +87,11 @@ namespace JabyEngine {
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static constexpr auto System_Clock_Div_8 = CounterMode::ClockSource.with(2);
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static constexpr auto System_Clock_Div_8_Too = CounterMode::ClockSource.with(3);
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};
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};
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__declare_io_port_global_struct(TimerInfo, Timer, counter_base_adr(2));
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}
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__declare_io_port_global_struct(struct Counter0, Counter0, counter_base_adr(0));
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__declare_io_port_global_struct(struct Counter1, Counter1, counter_base_adr(1));
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__declare_io_port_global_struct(struct Counter2, Counter2, counter_base_adr(2));
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}
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}
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@ -4,11 +4,9 @@
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#include <PSX/System/IOPorts/dma_io.hpp>
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#include <PSX/System/IOPorts/gpu_io.hpp>
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#include <stdio.h>
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namespace JabyEngine {
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namespace GPU {
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namespace Screen {
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struct ScreenHelper {
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struct Mode {
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enum struct TVEncoding {
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NTSC = 0,
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static constexpr auto HorizontalResolution368 = Bit<uint32_t>(6);
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static constexpr auto VerticalInterlace = Bit<uint32_t>(5);
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static constexpr auto DisplayAreaColorDepth = BitRange<GPU::DisplayAreaColorDepth>::from_to(4, 4);
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static constexpr auto DisplayAreaColorDepth = BitRange<GPU_IO::DisplayAreaColorDepth>::from_to(4, 4);
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static constexpr auto VideoMode = BitRange<TVEncoding>::from_to(3, 3);
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static constexpr auto VerticalResolution = BitRange<GPU::VerticalResolution>::from_to(2, 2);
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static constexpr auto HorizontalResolution = BitRange<GPU::HorizontalResolution>::from_to(0, 1);
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static constexpr auto VerticalResolution = BitRange<GPU_IO::VerticalResolution>::from_to(2, 2);
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static constexpr auto HorizontalResolution = BitRange<GPU_IO::HorizontalResolution>::from_to(0, 1);
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static constexpr uint32_t PAL() {
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return ComplexBitMap<uint32_t>::with(
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Mode::HorizontalResolution.with(GPU::HorizontalResolution::$320),
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Mode::VerticalResolution.with(GPU::VerticalResolution::$240),
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Mode::HorizontalResolution.with(GPU_IO::HorizontalResolution::$320),
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Mode::VerticalResolution.with(GPU_IO::VerticalResolution::$240),
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Mode::VideoMode.with(TVEncoding::PAL),
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Mode::DisplayAreaColorDepth.with(GPU::DisplayAreaColorDepth::$15bit)
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Mode::DisplayAreaColorDepth.with(GPU_IO::DisplayAreaColorDepth::$15bit)
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).raw;
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}
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static constexpr uint32_t NTSC() {
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return ComplexBitMap<uint32_t>::with(
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Mode::HorizontalResolution.with(GPU::HorizontalResolution::$320),
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Mode::VerticalResolution.with(GPU::VerticalResolution::$240),
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Mode::HorizontalResolution.with(GPU_IO::HorizontalResolution::$320),
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Mode::VerticalResolution.with(GPU_IO::VerticalResolution::$240),
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Mode::VideoMode.with(TVEncoding::NTSC),
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Mode::DisplayAreaColorDepth.with(GPU::DisplayAreaColorDepth::$15bit)
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Mode::DisplayAreaColorDepth.with(GPU_IO::DisplayAreaColorDepth::$15bit)
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).raw;
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}
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};
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@ -47,41 +45,41 @@ namespace JabyEngine {
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#ifdef JABYENGINE_PAL
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static constexpr uint16_t FirstVisiblePixelV = 0xA3;
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GP1.write(Command::GP1::DisplayMode(Mode::PAL()));
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GPU::Screen::Range::set_offset(0, 0);
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GPU_IO::GP1.write(GPU_IO::Command::GP1::DisplayMode(Mode::PAL()));
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GPU::Screen::set_offset(0, 0);
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#else
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static constexpr uint16_t FirstVisiblePixelV = 0x88;
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GP1.write(Command::GP1::DisplayMode(Mode::NTSC()));
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GPU_IO::GP1.write(GPU_IO::Command::GP1::DisplayMode(Mode::NTSC()));
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GPU::Screen::set_offset(0, 5); //< Random values
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#endif
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}
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void exchange_buffer_and_display();
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}
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static void exchange_buffer_and_display();
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};
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static void set_draw_area(uint16_t x, uint16_t y) {
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GP0.write(Command::GP0::DrawAreaTopLeft(x, y));
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GP0.write(Command::GP0::DrawAreaBottomRight((x + Display::Width), (y + Display::Height)));
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GPU_IO::GP0.write(GPU_IO::Command::GP0::DrawAreaTopLeft(x, y));
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GPU_IO::GP0.write(GPU_IO::Command::GP0::DrawAreaBottomRight((x + Display::Width), (y + Display::Height)));
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}
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static void quick_fill_fast(const Color24& color, const PositionU16& pos, const SizeU16& size) {
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GP0.write(Command::GP0::QuickFill(color));
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GP0.write(Command::GP0::TopLeftPosition(pos.x, pos.y));
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GP0.write(Command::GP0::WidthHeight(size.width, size.height));
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GPU_IO::GP0.write(GPU_IO::Command::GP0::QuickFill(color));
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GPU_IO::GP0.write(GPU_IO::Command::GP0::TopLeftPosition(pos.x, pos.y));
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GPU_IO::GP0.write(GPU_IO::Command::GP0::WidthHeight(size.width, size.height));
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}
|
||||
|
||||
static void reset_cmd_buffer() {
|
||||
GP1.write(Command::GP1::ResetCMDBufer());
|
||||
GPU_IO::GP1.write(GPU_IO::Command::GP1::ResetCMDBufer());
|
||||
}
|
||||
|
||||
static void wait_ready_for_CMD() {
|
||||
while(!GPUSTAT.read().is(GPUStatusRegister::GP0ReadyForCMD));
|
||||
while(!GPU_IO::GPUSTAT.read().is(GPU_IO::GPUStatusRegister::GP0ReadyForCMD));
|
||||
}
|
||||
|
||||
namespace DMA {
|
||||
static void wait() {
|
||||
while(::JabyEngine::DMA::GPU.channel_ctrl.read().is(::JabyEngine::DMA::CHCHR::Busy));
|
||||
while(::JabyEngine::DMA_IO::GPU.channel_ctrl.read().is(::JabyEngine::DMA_IO::CHCHR::Busy));
|
||||
}
|
||||
|
||||
static void end() {
|
||||
|
@ -91,28 +89,26 @@ namespace JabyEngine {
|
|||
namespace Receive {
|
||||
static void prepare()
|
||||
{
|
||||
GP1.write(Command::GP1::DMADirection(DMADirection::CPU2GPU));
|
||||
GPU_IO::GP1.write(GPU_IO::Command::GP1::DMADirection(GPU_IO::DMADirection::CPU2GPU));
|
||||
reset_cmd_buffer();
|
||||
}
|
||||
|
||||
static void set_src(uintptr_t adr) {
|
||||
printf("Source: 0x%p\n", adr);
|
||||
::JabyEngine::DMA::GPU.adr.write(::JabyEngine::DMA::MADR::MemoryAdr.with(static_cast<uint32_t>(adr)));
|
||||
DMA_IO::GPU.adr.write(DMA_IO::MADR::MemoryAdr.with(static_cast<uint32_t>(adr)));
|
||||
}
|
||||
|
||||
static void set_dst(const PositionU16& position, const SizeU16& size) {
|
||||
|
||||
wait_ready_for_CMD();
|
||||
GP0.write(Command::GP0::CPU2VRAM_Blitting());
|
||||
GP0.write(Command::GP0::TopLeftPosition(position.x, position.y));
|
||||
GP0.write(Command::GP0::WidthHeight(size.width, size.height));
|
||||
GPU_IO::GP0.write(GPU_IO::Command::GP0::CPU2VRAM_Blitting());
|
||||
GPU_IO::GP0.write(GPU_IO::Command::GP0::TopLeftPosition(position.x, position.y));
|
||||
GPU_IO::GP0.write(GPU_IO::Command::GP0::WidthHeight(size.width, size.height));
|
||||
}
|
||||
|
||||
static void start(uint16_t blockCount, uint16_t wordsPerBlock = 0x10) {
|
||||
typedef ::JabyEngine::DMA::BCR::SyncMode1 SyncMode1;
|
||||
typedef DMA_IO::BCR::SyncMode1 SyncMode1;
|
||||
|
||||
::JabyEngine::DMA::GPU.block_ctrl.write(SyncMode1::with(SyncMode1::BlockSize.with(wordsPerBlock), SyncMode1::BlockAmount.with(blockCount)));
|
||||
::JabyEngine::DMA::GPU.channel_ctrl.write(::JabyEngine::DMA::CHCHR::StartGPUReceive());
|
||||
DMA_IO::GPU.block_ctrl.write(SyncMode1::with(SyncMode1::BlockSize.with(wordsPerBlock), SyncMode1::BlockAmount.with(blockCount)));
|
||||
DMA_IO::GPU.channel_ctrl.write(DMA_IO::CHCHR::StartGPUReceive());
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
|
@ -46,9 +46,9 @@ namespace JabyEngine {
|
|||
}
|
||||
|
||||
void setup() {
|
||||
GP1.write(Command::GP1::Reset());
|
||||
Screen::configurate();
|
||||
Screen::exchange_buffer_and_display();
|
||||
GPU_IO::GP1.write(GPU_IO::Command::GP1::Reset());
|
||||
ScreenHelper::configurate();
|
||||
ScreenHelper::exchange_buffer_and_display();
|
||||
|
||||
GPU::wait_ready_for_CMD();
|
||||
quick_fill_fast(Color24::Black(), PositionU16(32, 0), SizeU16(Display::Width, Display::Height));
|
||||
|
|
|
@ -7,32 +7,32 @@ namespace JabyEngine {
|
|||
using namespace JabyEngine;
|
||||
|
||||
static void clear_main_volume() {
|
||||
static constexpr auto StartVol = SweepVolume::with(SweepVolume::VolumeEnable, SweepVolume::Volume.with(I16_MAX >> 2));
|
||||
static constexpr auto StartVol = SPU_IO::SweepVolume::with(SPU_IO::SweepVolume::VolumeEnable, SPU_IO::SweepVolume::Volume.with(I16_MAX >> 2));
|
||||
|
||||
MainVolume::left.write(StartVol);
|
||||
MainVolume::right.write(StartVol);
|
||||
SPU_IO::MainVolume::Left.write(StartVol);
|
||||
SPU_IO::MainVolume::Right.write(StartVol);
|
||||
}
|
||||
|
||||
static void clear_cd_and_ext_audio_volume() {
|
||||
CDVolume::left.write(0);
|
||||
CDVolume::right.write(0);
|
||||
SPU_IO::CDVolume::Left.write(0);
|
||||
SPU_IO::CDVolume::Right.write(0);
|
||||
|
||||
ExternalAudioInputVolume::left.write(0);
|
||||
ExternalAudioInputVolume::right.write(0);
|
||||
SPU_IO::ExternalAudioInputVolume::Left.write(0);
|
||||
SPU_IO::ExternalAudioInputVolume::Right.write(0);
|
||||
}
|
||||
|
||||
static void clear_control_register() {
|
||||
Control.write(ControlRegister());
|
||||
SPU_IO::Control.write(SPU_IO::ControlRegister());
|
||||
}
|
||||
|
||||
static void clear_voice() {
|
||||
for(auto& voice : Voices) {
|
||||
voice.volumeLeft.write(SweepVolume());
|
||||
voice.volumeRight.write(SweepVolume());
|
||||
voice.sampleRate.write(SampleRate());
|
||||
voice.ad.write(AD());
|
||||
voice.sr.write(SR());
|
||||
voice.currentVolume.write(SimpleVolume(0));
|
||||
for(auto& voice : SPU_IO::Voice) {
|
||||
voice.volumeLeft.write(SPU_IO::SweepVolume());
|
||||
voice.volumeRight.write(SPU_IO::SweepVolume());
|
||||
voice.sampleRate.write(SPU_IO::SampleRate());
|
||||
voice.ad.write(SPU_IO::AD());
|
||||
voice.sr.write(SPU_IO::SR());
|
||||
voice.currentVolume.write(SPU_IO::SimpleVolume(0));
|
||||
|
||||
voice.adr.write(0x200);
|
||||
voice.repeatAdr.write(0x200);
|
||||
|
@ -40,37 +40,37 @@ namespace JabyEngine {
|
|||
}
|
||||
|
||||
static void clear_pmon() {
|
||||
PMON.write(PitchModFlags());
|
||||
SPU_IO::PMON.write(SPU_IO::PitchModFlags());
|
||||
}
|
||||
|
||||
static void clear_noise_and_echo() {
|
||||
NON.write(NoiseGenerator());
|
||||
EON.write(EchoOn());
|
||||
SPU_IO::NON.write(SPU_IO::NoiseGenerator());
|
||||
SPU_IO::EON.write(SPU_IO::EchoOn());
|
||||
}
|
||||
|
||||
static void clear_reverb() {
|
||||
Reverb::Volume::left.write(0);
|
||||
Reverb::Volume::right.write(0);
|
||||
Reverb::work_area_adr.write(0);
|
||||
SPU_IO::Reverb::Volume::Left.write(0);
|
||||
SPU_IO::Reverb::Volume::Right.write(0);
|
||||
SPU_IO::Reverb::WorkAreaAdr.write(0);
|
||||
}
|
||||
|
||||
static void setup_control_register() {
|
||||
static constexpr auto SetupValue = ControlRegister::with(ControlRegister::Enable, ControlRegister::Unmute, ControlRegister::CDAudioEnable);
|
||||
static constexpr auto SetupValue = SPU_IO::ControlRegister::with(SPU_IO::ControlRegister::Enable, SPU_IO::ControlRegister::Unmute, SPU_IO::ControlRegister::CDAudioEnable);
|
||||
|
||||
Control.write(SetupValue);
|
||||
SPU_IO::Control.write(SetupValue);
|
||||
}
|
||||
|
||||
static void setup_data_transfer_control() {
|
||||
static constexpr uint16_t RequiredValue = (2 << 1);
|
||||
|
||||
DataTransferControl.write(RequiredValue);
|
||||
SPU_IO::DataTransferControl.write(RequiredValue);
|
||||
}
|
||||
|
||||
static void wait_voices() {
|
||||
static constexpr int16_t Treshhold = (I16_MAX*0.03);
|
||||
|
||||
try_again:
|
||||
for(const auto& voice : Voices) {
|
||||
for(const auto& voice : SPU_IO::Voice) {
|
||||
if(voice.currentVolume.read() > Treshhold) {
|
||||
goto try_again;
|
||||
}
|
||||
|
@ -78,7 +78,7 @@ namespace JabyEngine {
|
|||
}
|
||||
|
||||
void stop_voices() {
|
||||
Key::off.write(UI32_MAX);
|
||||
SPU_IO::Key::Off.write(UI32_MAX);
|
||||
}
|
||||
|
||||
void setup() {
|
||||
|
|
|
@ -7,7 +7,7 @@
|
|||
namespace JabyEngine {
|
||||
namespace Setup {
|
||||
static void enable_DMA() {
|
||||
DMA::DPCR.write(DMA::DPCR.read() | DMA::DMAControlRegister::SPUEnable | DMA::DMAControlRegister::GPUEnable);
|
||||
DMA_IO::DPCR.write(DMA_IO::DPCR.read() | DMA_IO::DMAControlRegister::SPUEnable | DMA_IO::DMAControlRegister::GPUEnable);
|
||||
}
|
||||
|
||||
JabyEngine::NextRoutine start() {
|
||||
|
|
|
@ -28,6 +28,8 @@ namespace JabyEngine {
|
|||
}
|
||||
|
||||
void setup() {
|
||||
using namespace Timer_IO;
|
||||
|
||||
static constexpr auto Mode = CounterMode::with(CounterMode::FreeRun, Counter2::SyncMode::Freerun, CounterMode::ResetAfterTarget, CounterMode::IRQAtTarget, CounterMode::IRQEveryTime, CounterMode::IRQPulse, Counter2::Source::System_Clock_Div_8);
|
||||
static constexpr uint16_t Target = MS_Per_Tick<uint16_t>(CPU_Frequncey_Hz_Div8)*10;
|
||||
|
||||
|
@ -37,8 +39,8 @@ namespace JabyEngine {
|
|||
__syscall_SysEnqIntRP(Timer2Irq, &IRQCallback);
|
||||
__syscall_ExitCriticalSection();
|
||||
|
||||
Counter2::Timer.target.write(CounterTarget::CounterTargetValue.with(Target));
|
||||
Counter2::Timer.mode.write(Mode);
|
||||
Counter2.target.write(CounterTarget::CounterTargetValue.with(Target));
|
||||
Counter2.mode.write(Mode);
|
||||
|
||||
Interrupt::enable_irq(Interrupt::Timer2);
|
||||
}
|
||||
|
|
|
@ -1,38 +0,0 @@
|
|||
#include "../include/GPU/gpu.hpp"
|
||||
|
||||
namespace JabyEngine {
|
||||
namespace GPU {
|
||||
namespace Screen {
|
||||
uint8_t CurrentDisplayAreaID = 1; //< Setup will call exchange and set it to 0
|
||||
|
||||
namespace Range {
|
||||
#ifdef JABYENGINE_PAL
|
||||
static constexpr uint16_t ScanlinesV = 288;
|
||||
#else
|
||||
static constexpr uint16_t ScanlinesV = 240;
|
||||
#endif //JABYENGINE_PAL
|
||||
|
||||
#ifndef USE_NO$PSX
|
||||
void set_offset(uint16_t x, uint16_t y) {
|
||||
x += 78;
|
||||
y += 43;
|
||||
|
||||
GP1.write(Command::GP1::HorizontalDisplayRange((x << 3), (x + Display::Width) << 3));
|
||||
GP1.write(Command::GP1::VerticalDisplayRange(y, y + Display::Height));
|
||||
}
|
||||
#else
|
||||
void set_offset(uint16_t x, uint16_t y) {
|
||||
GP1.write(Command::GP1::HorizontalDisplayRange(x, (x + Display::Width*8)));
|
||||
GP1.write(Command::GP1::VerticalDisplayRange(y - (ScanlinesV/2), y + (ScanlinesV/2)));
|
||||
}
|
||||
#endif //USE_NO$PSX
|
||||
}
|
||||
|
||||
void exchange_buffer_and_display() {
|
||||
GPU::set_draw_area(0, (Display::Height*CurrentDisplayAreaID));
|
||||
CurrentDisplayAreaID ^= 1;
|
||||
GP1.write(Command::GP1::DisplayArea(0, (Display::Height*CurrentDisplayAreaID)));
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
|
@ -0,0 +1,35 @@
|
|||
#include "../include/GPU/gpu.hpp"
|
||||
|
||||
namespace JabyEngine {
|
||||
namespace GPU {
|
||||
uint8_t Screen :: CurrentDisplayAreaID = 1; //< Setup will call exchange and set it to 0
|
||||
|
||||
#ifdef JABYENGINE_PAL
|
||||
static constexpr uint16_t ScanlinesV = 288;
|
||||
#else
|
||||
static constexpr uint16_t ScanlinesV = 240;
|
||||
#endif //JABYENGINE_PAL
|
||||
|
||||
void ScreenHelper :: exchange_buffer_and_display() {
|
||||
GPU::set_draw_area(0, (Display::Height*Screen::CurrentDisplayAreaID));
|
||||
Screen::CurrentDisplayAreaID ^= 1;
|
||||
GPU_IO::GP1.write(GPU_IO::Command::GP1::DisplayArea(0, (Display::Height*Screen::CurrentDisplayAreaID)));
|
||||
}
|
||||
|
||||
#ifndef USE_NO$PSX
|
||||
void Screen :: set_offset(uint16_t x, uint16_t y) {
|
||||
x += 78;
|
||||
y += 43;
|
||||
|
||||
GPU_IO::GP1.write(GPU_IO::Command::GP1::HorizontalDisplayRange((x << 3), (x + Display::Width) << 3));
|
||||
GPU_IO::GP1.write(GPU_IO::Command::GP1::VerticalDisplayRange(y, y + Display::Height));
|
||||
}
|
||||
#else
|
||||
void Screen :: set_offset(uint16_t x, uint16_t y) {
|
||||
GP1.write(Command::GP1::HorizontalDisplayRange(x, (x + Display::Width*8)));
|
||||
GP1.write(Command::GP1::VerticalDisplayRange(y - (ScanlinesV/2), y + (ScanlinesV/2)));
|
||||
}
|
||||
#endif //USE_NO$PSX
|
||||
}
|
||||
|
||||
}
|
Loading…
Reference in New Issue