Implement GPUSTAT and update IOPort design

This commit is contained in:
Jaby 2022-09-07 21:45:28 +02:00
parent a2532b03fc
commit d9da876bab
7 changed files with 168 additions and 72 deletions

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@ -0,0 +1,29 @@
#ifndef __JABYENGINE_GPU_TYPES_HPP__
#define __JABYENGINE_GPU_TYPES_HPP__
#include "../jabyengine_defines.h"
namespace GPU {
struct __no_align Color3 {
uint8_t blue;
uint8_t green;
uint8_t red;
static constexpr Color3 black() {
return {0x0, 0x0, 0x0};
}
static constexpr Color3 rgb(uint8_t r, uint8_t g, uint8_t b) {
return {b, g, r};
}
};
struct __no_align Color {
uint8_t reserved;
Color3 color_data;
constexpr Color(Color3 color) : reserved(0), color_data(color) {
}
};
}
#endif //!__JABYENGINE_GPU_TYPES_HPP__

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@ -7,20 +7,20 @@ namespace DMA {
struct __no_align MADR : public ComplexBitMap<uint32_t> {
__io_port_inherit_complex_bit_map(MADR);
static constexpr BitRange<uint32_t> MemoryAdr = BitRange<uint32_t>::from_to(0, 23);
static constexpr auto MemoryAdr = BitRange<uint32_t>::from_to(0, 23);
};
struct __no_align BCR : public ComplexBitMap<uint32_t> {
__io_port_inherit_complex_bit_map(BCR);
struct __no_align SyncMode0 {
static constexpr BitRange<uint16_t> NumberOfWords = BitRange<uint16_t>::from_to(0, 15);
static constexpr Bit<uint16_t> CD_OneBlock = 16;
static constexpr auto NumberOfWords = BitRange<uint16_t>::from_to(0, 15);
static constexpr auto CD_OneBlock = Bit<uint16_t>(16);
};
struct __no_align SyncMode1 {
static constexpr BitRange<uint16_t> BlockSize = BitRange<uint16_t>::from_to(0, 15);
static constexpr BitRange<uint16_t> BlockAmount = BitRange<uint16_t>::from_to(16, 31);
static constexpr auto BlockSize = BitRange<uint16_t>::from_to(0, 15);
static constexpr auto BlockAmount = BitRange<uint16_t>::from_to(16, 31);
};
struct __no_align SyncMode2 {
@ -36,26 +36,26 @@ namespace DMA {
Sync2 = 2, //Linked List
};
static constexpr Bit<uint32_t> ManualStart = 28;
static constexpr auto ManualStart = Bit<uint32_t>(28);
static constexpr Bit<uint32_t> Start = 24;
static constexpr auto Busy = Start;
static constexpr auto Start = Bit<uint32_t>(24);
static constexpr auto Busy = Start;
static constexpr BitRange<uint32_t> ChoppingCPUWindowSize = BitRange<uint32_t>::from_to(20, 22);
static constexpr BitRange<uint32_t> ChoppingDMAWindowSize = BitRange<uint32_t>::from_to(16, 18);
static constexpr auto ChoppingCPUWindowSize = BitRange<uint32_t>::from_to(20, 22);
static constexpr auto ChoppingDMAWindowSize = BitRange<uint32_t>::from_to(16, 18);
static constexpr BitRange<_SyncMode> SyncMode = BitRange<_SyncMode>::from_to(9, 10);
static constexpr auto UseSyncMode0 = (SyncMode << Sync0);
static constexpr auto UseSyncMode1 = (SyncMode << Sync1);
static constexpr auto UseSyncMode2 = (SyncMode << Sync2);
static constexpr auto SyncMode = BitRange<_SyncMode>::from_to(9, 10);
static constexpr auto UseSyncMode0 = SyncMode.with(Sync0);
static constexpr auto UseSyncMode1 = SyncMode.with(Sync1);
static constexpr auto UseSyncMode2 = SyncMode.with(Sync2);
static constexpr Bit<uint32_t> UseChopping = 8;
static constexpr auto UseChopping = Bit<uint32_t>(8);
static constexpr Bit<uint32_t> MemoryAdrDecreaseBy4 = 1;
static constexpr auto MemoryAdrIncreaseBy4 = !MemoryAdrDecreaseBy4;
static constexpr auto MemoryAdrDecreaseBy4 = Bit<uint32_t>(1);
static constexpr auto MemoryAdrIncreaseBy4 = !MemoryAdrDecreaseBy4;
static constexpr Bit<uint32_t> FromMainRAM = 0;
static constexpr auto ToMainRAM = !FromMainRAM;
static constexpr auto FromMainRAM = Bit<uint32_t>(0);
static constexpr auto ToMainRAM = !FromMainRAM;
static constexpr CHCHR StartMDECin() {
return CHCHR(0x01000201);
@ -96,36 +96,36 @@ namespace DMA {
struct __no_align DMAControlRegister : public ComplexBitMap<uint32_t> {
__io_port_inherit_complex_bit_map(DMAControlRegister);
static constexpr Bit<uint32_t> OTCEnable = 27;
static constexpr BitRange<Priority> OTCPriority = BitRange<Priority>::from_to(24, 26);
static constexpr auto OTCEnable = Bit<uint32_t>(27);
static constexpr auto OTCPriority = BitRange<Priority>::from_to(24, 26);
static constexpr Bit<uint32_t> PIOEnable = 23;
static constexpr BitRange<Priority> PIOPriority = BitRange<Priority>::from_to(20, 22);
static constexpr auto PIOEnable = Bit<uint32_t>(23);
static constexpr auto PIOPriority = BitRange<Priority>::from_to(20, 22);
static constexpr Bit<uint32_t> SPUEnable = 19;
static constexpr BitRange<Priority> SPUPriority = BitRange<Priority>::from_to(16, 18);
static constexpr auto SPUEnable = Bit<uint32_t>(19);
static constexpr auto SPUPriority = BitRange<Priority>::from_to(16, 18);
static constexpr Bit<uint32_t> CDROMEnable = 15;
static constexpr BitRange<Priority> CDROMPriority = BitRange<Priority>::from_to(12, 14);
static constexpr auto CDROMEnable = Bit<uint32_t>(15);
static constexpr auto CDROMPriority = BitRange<Priority>::from_to(12, 14);
static constexpr Bit<uint32_t> GPUEnable = 11;
static constexpr BitRange<Priority> GPUPriority = BitRange<Priority>::from_to(8, 10);
static constexpr auto GPUEnable = Bit<uint32_t>(11);
static constexpr auto GPUPriority = BitRange<Priority>::from_to(8, 10);
static constexpr Bit<uint32_t> MDECoutEnable = 7;
static constexpr BitRange<Priority> MDECoutPriority = BitRange<Priority>::from_to(4, 6);
static constexpr auto MDECoutEnable = Bit<uint32_t>(7);
static constexpr auto MDECoutPriority = BitRange<Priority>::from_to(4, 6);
static constexpr Bit<uint32_t> MDECinEnable = 3;
static constexpr BitRange<Priority> MDECinPriority = BitRange<Priority>::from_to(0, 2);
static constexpr auto MDECinEnable = Bit<uint32_t>(3);
static constexpr auto MDECinPriority = BitRange<Priority>::from_to(0, 2);
};
struct __no_align DMAInterruptRegister : public ComplexBitMap<uint32_t> {
__io_port_inherit_complex_bit_map(DMAInterruptRegister);
static constexpr Bit<uint32_t> MasterEnable = 31;
static constexpr BitRange<uint32_t> Flags = BitRange<uint32_t>::from_to(24, 30);
static constexpr Bit<uint32_t> MasterEnableDPCR = 23;
static constexpr BitRange<uint32_t> EnableDPCR = BitRange<uint32_t>::from_to(16, 22);
static constexpr Bit<uint32_t> ForceIRQ = 15;
static constexpr auto MasterEnable = Bit<uint32_t>(31);
static constexpr auto Flags = BitRange<uint32_t>::from_to(24, 30);
static constexpr auto MasterEnableDPCR = Bit<uint32_t>(23);
static constexpr auto EnableDPCR = BitRange<uint32_t>::from_to(16, 22);
static constexpr auto ForceIRQ = Bit<uint32_t>(15);
};
__declare_io_port_global(Registers, MDECin, 0x1F801080);

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@ -4,9 +4,71 @@
namespace GPU {
namespace Port {
struct __no_align Command : public ComplexBitMap<uint32_t> {
enum struct SemiTransparency {
B_Half_add_F_Half = 0,
B_add_F = 1,
B_sub_F = 2,
B_add_F_Quarter = 3,
};
enum struct TexturePageColor {
_4bit = 0,
_8bit = 1,
_15bit = 2,
};
enum struct HorizontalResolution {
_256 = 0,
_320 = 1,
_512 = 2,
_640 = 3,
};
enum struct VerticalResolution {
_240 = 0,
_480 = 1
};
enum struct DMADirection {
Off = 0,
Unknown = 1,
CPU2GPU = 2,
GPU2CPU = 3,
};
struct __no_align Command : public ComplexBitMap<uint32_t> {
};
struct __no_align GPUStatusRegister : public ComplexBitMap<uint32_t> {
static constexpr auto DrawingOddLinesInterlaced = Bit<uint32_t>(31);
static constexpr auto DMADirectionValue = BitRange<DMADirection>::from_to(29, 30);
static constexpr auto DMAReady = Bit<uint32_t>(28);
static constexpr auto VRAMtoCPUtransferReay = Bit<uint32_t>(27);
static constexpr auto GP0ReadyForCMD = Bit<uint32_t>(26);
static constexpr auto FifoNotFull = Bit<uint32_t>(25); // Only for Fifo
static constexpr auto InterruptRequest = Bit<uint32_t>(24);
static constexpr auto DisplayDisabled = Bit<uint32_t>(23);
static constexpr auto VerticalInterlaceOn = Bit<uint32_t>(22);
static constexpr auto DisplayAreaColorDepth24bit = Bit<uint32_t>(21);
static constexpr auto VideoModePal = Bit<uint32_t>(20);
static constexpr auto VerticalResolutionValue = BitRange<VerticalResolution>::from_to(19, 19);
static constexpr auto HorizontalResolutionValue = BitRange<HorizontalResolution>::from_to(17, 18);
static constexpr auto HorizontalResolution368 = Bit<uint32_t>(16);
static constexpr auto TexturesDisabled = Bit<uint32_t>(15);
static constexpr auto NotDrawingMaskedPixels = Bit<uint32_t>(12);
static constexpr auto MaskBitSetDuringDrawEnabled = Bit<uint32_t>(11);
static constexpr auto DrawingToDisplayAreadAllowed = Bit<uint32_t>(10);
static constexpr auto DitherEnabled = Bit<uint32_t>(9);
static constexpr auto TexturePageColorValue = BitRange<TexturePageColor>::from_to(7, 8);
static constexpr auto SemiTransparencyValue = BitRange<SemiTransparency>::from_to(5, 6);
static constexpr auto TexturePageY = BitRange<uint32_t>::from_to(4, 4); // N*256
static constexpr auto TexturePageX = BitRange<uint32_t>::from_to(0, 3); // N*64
static constexpr auto VerticalResolution480 = Bit<uint32_t>(19);
static constexpr auto TexturePageY256 = Bit<uint32_t>(4);
};
__declare_io_port_global_const(GPUStatusRegister, GPUSTAT, 0x1F801814);
}
}

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@ -251,8 +251,10 @@ struct __no_align ubus32_t {
};
static constexpr uintptr_t IO_Base_Mask = 0xF0000000;
static constexpr uintptr_t IO_Base_Adr = 0x10000000;
#define __declare_io_port_global_raw(cv, type, name, adr) static __always_inline cv auto& name = *reinterpret_cast<IOPort<type>*>((IO_Base_Adr + (adr & ~IO_Base_Mask)))
#define __declare_io_port_global(type, name, adr) static __always_inline auto& name = *reinterpret_cast<IOPort<type>*>((IO_Base_Adr + (adr & ~IO_Base_Mask)))
#define __declare_io_port_global(type, name, adr) __declare_io_port_global_raw(, type, name, adr)
#define __declare_io_port_global_const(type, name, adr) __declare_io_port_global_raw(const, type, name, adr)
#define __declare_io_port_global_array(type, name, adr, size) static __always_inline auto& name = reinterpret_cast<type(&)[size]>(*reinterpret_cast<type*>((IO_Base_Adr + (adr & ~IO_Base_Mask))));
#define __io_port_inherit_complex_bit_map(name) \
using ComplexBitMap::operator=; \

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@ -40,37 +40,37 @@ namespace SPU {
__io_port_inherit_complex_bit_map(SweepVolume);
// For Volume Mode
static constexpr Bit<int16_t> SweepEnable = 15; // 0 Volume Mode; 1 Sweep Mode
static constexpr auto VolumeEnable = !SweepEnable;
static constexpr BitRange<int16_t> Volume = BitRange<int16_t>::from_to(0, 14);
static constexpr auto SweepEnable = Bit<int16_t>(15);
static constexpr auto VolumeEnable = !SweepEnable;
static constexpr auto Volume = BitRange<int16_t>::from_to(0, 14);
// For Sweep Mode
static constexpr Bit<Mode> SweepMode = 14;
static constexpr Bit<Direction> SweepDirection = 13;
static constexpr Bit<Phase> SweepPhase = 12;
static constexpr BitRange<Shift> SweepShift = BitRange<Shift>::from_to(2, 6);
static constexpr BitRange<Step> SweepStep = BitRange<Step>::from_to(0, 1);
static constexpr auto SweepMode = Bit<Mode>(14);
static constexpr auto SweepDirection = Bit<Direction>(13);
static constexpr auto SweepPhase = Bit<Phase>(12);
static constexpr auto SweepShift = BitRange<Shift>::from_to(2, 6);
static constexpr auto SweepStep = BitRange<Step>::from_to(0, 1);
};
struct __no_align SR : public ComplexBitMap<uint16_t> {
__io_port_inherit_complex_bit_map(SR);
static constexpr Bit<Mode> SustainMode = (31 - 16);
static constexpr Bit<Direction> SustainDirection = (30 - 16);
static constexpr BitRange<Shift> SustainShift = BitRange<Shift>::from_to((24 - 16), (28 - 16));
static constexpr BitRange<Step> SustainStep = BitRange<Step>::from_to((22 - 16), (23 - 16));
static constexpr Bit<Mode> ReleaseMode = (21 - 16);
static constexpr BitRange<Shift> ReleaseShift = BitRange<Shift>::from_to((16 - 16), (20 - 16));
static constexpr auto SustainMode = Bit<Mode>(31 - 16);
static constexpr auto SustainDirection = Bit<Direction>(30 - 16);
static constexpr auto SustainShift = BitRange<Shift>::from_to((24 - 16), (28 - 16));
static constexpr auto SustainStep = BitRange<Step>::from_to((22 - 16), (23 - 16));
static constexpr auto ReleaseMode = Bit<Mode>(21 - 16);
static constexpr auto ReleaseShift = BitRange<Shift>::from_to((16 - 16), (20 - 16));
};
struct __no_align AD : public ComplexBitMap<uint16_t> {
__io_port_inherit_complex_bit_map(AD);
static constexpr Bit<Mode> AttackMode = 15;
static constexpr BitRange<Shift> AttackShift = BitRange<Shift>::from_to(10, 14);
static constexpr BitRange<Step> AttackStep = BitRange<Step>::from_to(8, 9);
static constexpr BitRange<Shift> DecayShift = BitRange<Shift>::from_to(4, 7);
static constexpr BitRange<uint16_t> SustainLevel = BitRange<uint16_t>::from_to(0, 3);
static constexpr auto AttackMode = Bit<Mode>(15);
static constexpr auto AttackShift = BitRange<Shift>::from_to(10, 14);
static constexpr auto AttackStep = BitRange<Step>::from_to(8, 9);
static constexpr auto DecayShift = BitRange<Shift>::from_to(4, 7);
static constexpr auto SustainLevel = BitRange<uint16_t>::from_to(0, 3);
};
struct __no_align Voice {
@ -94,17 +94,17 @@ namespace SPU {
DMARead = 3
};
static constexpr Bit<uint16_t> Enable = 15;
static constexpr Bit<uint16_t> Unmute = 14;
static constexpr BitRange<Shift> NoiseFrequcenyShift = BitRange<Shift>::from_to(10, 13);
static constexpr BitRange<Step> NoiseFrequcenyStep = BitRange<Step>::from_to(8, 9);
static constexpr Bit<uint16_t> ReverbMasterEnable = 7;
static constexpr Bit<uint16_t> IRQ9Enable = 6;
static constexpr BitRange<RAMTransferMode> TransferMode = BitRange<RAMTransferMode>::from_to(4, 5);
static constexpr Bit<uint16_t> ExternalAudioReverb = 3;
static constexpr Bit<uint16_t> CDAudioReverb = 2;
static constexpr Bit<uint16_t> ExternalAudioEnable = 1;
static constexpr Bit<uint16_t> CDAudioEnable = 0;
static constexpr auto Enable = Bit<uint16_t>(15);
static constexpr auto Unmute = Bit<uint16_t>(14);
static constexpr auto NoiseFrequcenyShift = BitRange<Shift>::from_to(10, 13);
static constexpr auto NoiseFrequcenyStep = BitRange<Step>::from_to(8, 9);
static constexpr auto ReverbMasterEnable = Bit<uint16_t>(7);
static constexpr auto IRQ9Enable = Bit<uint16_t>(6);
static constexpr auto TransferMode = BitRange<RAMTransferMode>::from_to(4, 5);
static constexpr auto ExternalAudioReverb = Bit<uint16_t>(3);
static constexpr auto CDAudioReverb = Bit<uint16_t>(2);
static constexpr auto ExternalAudioEnable = Bit<uint16_t>(1);
static constexpr auto CDAudioEnable = Bit<uint16_t>(0);
};
struct __no_align PitchModFlags : public ComplexBitMap<uint16_t> {

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@ -1,5 +1,7 @@
#include <PSX/GPU/GPU_Types.hpp>
namespace GPU {
void setup() {
}
}

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@ -1,5 +1,6 @@
#include <PSX/System/IOPorts/SPU_IO.hpp>
#include <PSX/System/IOPorts/DMA_IO.hpp>
#include <limits.h>
namespace SPU {
using namespace Port;