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DMA SPU memory

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jaby
2024-09-16 21:52:27 +02:00
parent 2f0d972a2a
commit efd887268b
6 changed files with 54 additions and 12 deletions
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16
include/PSX/System/IOPorts/IOValues/spu_io_values.hpp
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@@ -24,6 +24,22 @@ namespace JabyEngine {
static constexpr auto CDAudioEnable = Bit(0);
};
__declare_io_value(StatusRegister, uint16_t) {
static constexpr auto Unused = BitRange::from_to(12, 15);
static constexpr auto CaputreBufferHalf = Bit(11); // TODO: Turn into enum?; Writing to First/Second half of Capture Buffers (0=First, 1=Second)
static constexpr auto TransferBusy = Bit(10);
static constexpr auto IsDMARead = Bit(9);
static constexpr auto isDMAWrite = Bit(8);
static constexpr auto isDMA = Bit(7);
static constexpr auto isIRQ = Bit(6);
// Copies of ControlRegister
static constexpr auto TransferMode = BitRange::from_to(4, 5);
static constexpr auto ExternalAudioReverb = Bit(3);
static constexpr auto CDAudioReverb = Bit(2);
static constexpr auto ExternalAudioEnable = Bit(1);
static constexpr auto CDAudioEnable = Bit(0);
};
__declare_io_value(SRAM_Adr, uint16_t) {};
}
}

3
include/PSX/System/IOPorts/spu_io.hpp
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@@ -163,8 +163,11 @@ namespace JabyEngine {
}
};
struct StatusRegisterIO : public IOPort<SPU_IO_Values::StatusRegister> {};
// TODO: The new way? v Parse with a Macro?
static auto& ControlRegister = *reinterpret_cast<ControlRegisterIO*>(0x1F801DAA);
static auto& StatusRegister = *reinterpret_cast<StatusRegisterIO*>(0x1F801DAE);
static auto& SRAMTransferAdr = *reinterpret_cast<SRAMTransferAddressIO*>(0x1F801DA6);
//__declare_io_port(, ControlRegister, 0x1F801DAA);