jaby/jabyengine
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases 1 Wiki Activity

Merge branch 'main' into GPU-Setup

Browse Source
This commit is contained in:
jaby
2022-09-07 19:09:35 +02:00
parent d1318dea9c c9d4af9376
commit f10c9edc21
4 changed files with 136 additions and 88 deletions
Download Patch File Download Diff File Expand all files Collapse all files

20
include/PSX/System/IOPorts/DMA_IO.hpp
View File

@@ -3,14 +3,14 @@
#include "IOPort.hpp"
namespace DMA {
struct __no_align MADR : public IOPort<uint32_t> {
__io_port_inherit(MADR);
struct __no_align MADR : public ComplexBitMap<uint32_t> {
__io_port_inherit_complex_bit_map(MADR);
static constexpr BitRange<uint32_t> MemoryAdr = BitRange<uint32_t>::from_to(0, 23);
};
struct __no_align BCR : public IOPort<uint32_t> {
__io_port_inherit(BCR);
struct __no_align BCR : public ComplexBitMap<uint32_t> {
__io_port_inherit_complex_bit_map(BCR);
struct __no_align SyncMode0 {
static constexpr BitRange<uint16_t> NumberOfWords = BitRange<uint16_t>::from_to(0, 15);
@@ -26,8 +26,8 @@ namespace DMA {
};
};
struct __no_align CHCHR : public IOPort<uint32_t> {
__io_port_inherit(CHCHR);
struct __no_align CHCHR : public ComplexBitMap<uint32_t> {
__io_port_inherit_complex_bit_map(CHCHR);
enum _SyncMode {
Sync0 = 0, //Start immediately,
@@ -92,8 +92,8 @@ namespace DMA {
static constexpr Priority HighestPriority = 0;
static constexpr Priority LowestPriority = 7;
struct __no_align DMAControlRegister : public IOPort<uint32_t> {
__io_port_inherit(DMAControlRegister);
struct __no_align DMAControlRegister : public ComplexBitMap<uint32_t> {
__io_port_inherit_complex_bit_map(DMAControlRegister);
static constexpr Bit<uint32_t> OTCEnable = 27;
static constexpr BitRange<Priority> OTCPriority = BitRange<Priority>::from_to(24, 26);
@@ -117,8 +117,8 @@ namespace DMA {
static constexpr BitRange<Priority> MDECinPriority = BitRange<Priority>::from_to(0, 2);
};
struct __no_align DMAInterruptRegister : public IOPort<uint32_t> {
__io_port_inherit(DMAInterruptRegister);
struct __no_align DMAInterruptRegister : public ComplexBitMap<uint32_t> {
__io_port_inherit_complex_bit_map(DMAInterruptRegister);
static constexpr Bit<uint32_t> MasterEnable = 31;
static constexpr BitRange<uint32_t> Flags = BitRange<uint32_t>::from_to(24, 30);

155
include/PSX/System/IOPorts/IOPort.hpp
View File

@@ -27,6 +27,13 @@ struct Bit {
}
};
template<typename T>
struct BitRangeValue {
T value;
size_t begin;
size_t length;
};
template<typename T>
struct BitRange {
typedef T ValueType;
@@ -37,35 +44,45 @@ struct BitRange {
static constexpr BitRange<T> from_to(size_t start, size_t end) {
return {start, (end - start + 1)};
}
};
template<typename T>
struct BitRangeValue {
T value;
BitRange<T> range;
constexpr BitRangeValue(BitRange<T> range, T value) : value(value), range(range) {
constexpr BitRangeValue<T> with(T value) const {
return {value, this->begin, this->length};
}
};
template<typename T>
static constexpr __always_inline BitRangeValue<T> operator<<(const BitRange<T>& range, T value) {
return BitRangeValue(range, value);
return BitRangeValue{value, range.begin, range.length};
}
template<typename T>
class __no_align IOPort {
class __no_align ComplexBitMap {
private:
T value = 0;
template<typename S>
constexpr ComplexBitMap<T>& set_va(const S& value) {
return this->set(value);
}
template<typename S, typename...ARGS>
constexpr ComplexBitMap<T>& set_va(const S& value, const ARGS&...args) {
return this->set_va(value).set_va(args...);
}
public:
constexpr IOPort() = default;
constexpr IOPort(T value) : value(value) {
constexpr ComplexBitMap() = default;
constexpr ComplexBitMap(T value) : value(value) {
}
template<typename...ARGS>
static constexpr ComplexBitMap<T> with(ARGS...args) {
return ComplexBitMap().set_va(args...);
}
//Accesssing bits
template<typename S>
constexpr IOPort<T>& set_bit(S bit) {
constexpr ComplexBitMap<T>& set_bit(S bit) {
this->value = bit::set(this->value, static_cast<size_t>(bit));
return *this;
}
@@ -76,7 +93,7 @@ public:
}
template<typename S>
constexpr IOPort<T>& clear_bit(S bit) {
constexpr ComplexBitMap<T>& clear_bit(S bit) {
this->value = bit::clear(this->value, static_cast<size_t>(bit));
return *this;
}
@@ -98,7 +115,7 @@ public:
//Accessing values
template<typename S>
constexpr IOPort<T>& set_value(S value, const BitRange<S>& range) {
constexpr ComplexBitMap<T>& set_value(S value, const BitRange<S>& range) {
this->value = bit::value::set_normalized(this->value, static_cast<T>(value), range.begin, range.length);
return *this;
}
@@ -109,7 +126,7 @@ public:
}
template<typename S>
constexpr IOPort<T>& clear_value(const BitRange<S>& range) {
constexpr ComplexBitMap<T>& clear_value(const BitRange<S>& range) {
this->value = bit::value::clear_normalized(this->value, range.begin, range.length);
return *this;
}
@@ -129,6 +146,67 @@ public:
return static_cast<S>(bit::value::get_normalized(this->value, range.begin, range.length));
}
// For easier constructing
constexpr ComplexBitMap<T>& set(const BitRange<T>& range, T value) {
this->set_value(value, range);
return *this;
}
constexpr ComplexBitMap<T>& set(const BitRangeValue<T>& value) {
this->set_value(value.value, {value.begin, value.length});
return *this;
}
constexpr ComplexBitMap<T>& set(const Bit<T>& bit) {
this->set_bit(bit.value);
return *this;
}
constexpr ComplexBitMap<T>& set(const ClearBitValue& value) {
this->clear_bit(value.bit);
return *this;
}
constexpr ComplexBitMap<T>& operator|(const BitRangeValue<T>& value) {
this->set_value(value.value, value.range);
return *this;
}
constexpr ComplexBitMap<T>& operator|(const Bit<T>& bit) {
this->set_bit(bit.value);
return *this;
}
constexpr ComplexBitMap<T>& operator|(const ClearBitValue& value) {
this->clear_bit(value.bit);
return *this;
}
//For raw access
constexpr operator T() const {
return this->value;
}
constexpr operator T() const volatile {
return this->value;
}
constexpr ComplexBitMap<T>& operator=(T value) {
this->value = value;
return *this;
}
constexpr void operator=(T value) volatile {
this->value = value;
}
};
template<typename T>
class __no_align IOPort {
private:
T value;
public:
//For easy access
constexpr T read() const {
return const_cast<volatile IOPort<T>*>(this)->value;
@@ -141,45 +219,11 @@ public:
constexpr volatile T& ref() {
return const_cast<volatile IOPort<T>*>(this)->value;
}
//For raw access
constexpr operator T() const {
return this->value;
}
constexpr operator T() const volatile {
return this->value;
}
constexpr IOPort<T>& operator=(T value) {
this->value = value;
return *this;
}
constexpr void operator=(T value) volatile {
this->value = value;
}
// For easier constructing
constexpr IOPort<T>& operator|(const BitRangeValue<T>& value) {
this->set_value(value.value, value.range);
return *this;
}
constexpr IOPort<T>& operator|(const Bit<T>& bit) {
this->set_bit(bit.value);
return *this;
}
constexpr IOPort<T>& operator|(const ClearBitValue& value) {
this->clear_bit(value.bit);
return *this;
}
};
struct __no_align ubus32_t {
IOPort<uint16_t> low;
IOPort<uint16_t> high;
ComplexBitMap<uint16_t> low;
ComplexBitMap<uint16_t> high;
constexpr ubus32_t(uint32_t value) {
*this = value;
@@ -210,10 +254,13 @@ static constexpr uintptr_t IO_Base_Adr = 0x10000000;
#define __declare_io_port_global(type, name, adr) static __always_inline auto& name = *reinterpret_cast<IOPort<type>*>((IO_Base_Adr + (adr & ~IO_Base_Mask)))
#define __declare_io_port_global_array(type, name, adr, size) static __always_inline auto& name = reinterpret_cast<type(&)[size]>(*reinterpret_cast<type*>((IO_Base_Adr + (adr & ~IO_Base_Mask))));
#define __io_port_inherit(name) \
using IOPort::operator=; \
#define __io_port_inherit_complex_bit_map(name) \
using ComplexBitMap::operator=; \
constexpr name() = default; \
constexpr name(IOPort value) : IOPort(value) { \
constexpr name(ComplexBitMap value) : ComplexBitMap(value) { \
}\
template<typename...ARGS> \
constexpr name(ARGS...args) : ComplexBitMap(args...) {\
}
#endif //!__JABYENGINE_IOPORT_HPP__

45
include/PSX/System/IOPorts/SPU_IO.hpp
View File

@@ -26,23 +26,24 @@ namespace SPU {
//0..3 = +7, +6, +5, +4 or -6, -7, -6, -5
typedef uint8_t Step;
struct __no_align SampleRate : public IOPort<uint16_t> {
__io_port_inherit(SampleRate);
struct __no_align SampleRate : public ComplexBitMap<uint16_t> {
__io_port_inherit_complex_bit_map(SampleRate);
static constexpr SampleRate from_HZ(double freq) {
//4096 == 44100Hz
constexpr double Base = (4096.0 / 44100.0);
return IOPort(static_cast<uint16_t>((freq*Base)));
return ComplexBitMap(static_cast<uint16_t>((freq*Base)));
}
};
struct __no_align SweepVolume : public IOPort<int16_t> {
__io_port_inherit(SweepVolume);
struct __no_align SweepVolume : public ComplexBitMap<int16_t> {
__io_port_inherit_complex_bit_map(SweepVolume);
// For Volume Mode
static constexpr Bit<int16_t> SweepEnable = 15; // 0 Volume Mode; 1 Sweep Mode
static constexpr BitRange<int16_t> Volume = BitRange<int16_t>::from_to(0, 14);
static constexpr Bit<int16_t> SweepEnable = 15; // 0 Volume Mode; 1 Sweep Mode
static constexpr auto VolumeEnable = !SweepEnable;
static constexpr BitRange<int16_t> Volume = BitRange<int16_t>::from_to(0, 14);
// For Sweep Mode
static constexpr Bit<Mode> SweepMode = 14;
@@ -52,8 +53,8 @@ namespace SPU {
static constexpr BitRange<Step> SweepStep = BitRange<Step>::from_to(0, 1);
};
struct __no_align SR : public IOPort<uint16_t> {
__io_port_inherit(SR);
struct __no_align SR : public ComplexBitMap<uint16_t> {
__io_port_inherit_complex_bit_map(SR);
static constexpr Bit<Mode> SustainMode = (31 - 16);
static constexpr Bit<Direction> SustainDirection = (30 - 16);
@@ -63,8 +64,8 @@ namespace SPU {
static constexpr BitRange<Shift> ReleaseShift = BitRange<Shift>::from_to((16 - 16), (20 - 16));
};
struct __no_align AD : public IOPort<uint16_t> {
__io_port_inherit(AD);
struct __no_align AD : public ComplexBitMap<uint16_t> {
__io_port_inherit_complex_bit_map(AD);
static constexpr Bit<Mode> AttackMode = 15;
static constexpr BitRange<Shift> AttackShift = BitRange<Shift>::from_to(10, 14);
@@ -74,9 +75,9 @@ namespace SPU {
};
struct __no_align Voice {
SweepVolume volumeLeft; //Offset: 0x0
SweepVolume volumeRight; //Offset: 0x2
SampleRate sampleRate; //Offset: 0x4;
IOPort<SweepVolume> volumeLeft; //Offset: 0x0
IOPort<SweepVolume> volumeRight; //Offset: 0x2
IOPort<SampleRate> sampleRate; //Offset: 0x4;
IOPort<uint16_t> adr; //Offset: 0x6
IOPort<AD> ad; //Offset: 0x8
IOPort<SR> sr; //Offset: 0xA
@@ -84,8 +85,8 @@ namespace SPU {
IOPort<uint16_t> repeatAdr; //Offset: 0xE
};
struct __no_align ControlRegister : public IOPort<uint16_t> {
__io_port_inherit(ControlRegister);
struct __no_align ControlRegister : public ComplexBitMap<uint16_t> {
__io_port_inherit_complex_bit_map(ControlRegister);
enum RAMTransferMode {
Stop = 0,
@@ -107,20 +108,20 @@ namespace SPU {
static constexpr Bit<uint16_t> CDAudioEnable = 0;
};
struct __no_align PitchModFlags : public IOPort<uint16_t> {
__io_port_inherit(PitchModFlags);
struct __no_align PitchModFlags : public ComplexBitMap<uint16_t> {
__io_port_inherit_complex_bit_map(PitchModFlags);
static constexpr BitRange<uint16_t> EnableBits = BitRange<uint16_t>::from_to(1, 23);
};
struct __no_align NoiseGenerator : public IOPort<uint16_t> {
__io_port_inherit(NoiseGenerator);
struct __no_align NoiseGenerator : public ComplexBitMap<uint16_t> {
__io_port_inherit_complex_bit_map(NoiseGenerator);
static constexpr BitRange<uint16_t> NoiseBits = BitRange<uint16_t>::from_to(0, 23);
};
struct __no_align EchoOn : public IOPort<uint16_t> {
__io_port_inherit(EchoOn);
struct __no_align EchoOn : public ComplexBitMap<uint16_t> {
__io_port_inherit_complex_bit_map(EchoOn);
static constexpr BitRange<uint16_t> EchoBits = BitRange<uint16_t>::from_to(0, 23);
};