128 lines
5.3 KiB
C++
128 lines
5.3 KiB
C++
#ifndef __JABYENGINE_GPU_IO_HPP__
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#define __JABYENGINE_GPU_IO_HPP__
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#include "IOPort.hpp"
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#include "../../GPU/GPU_Types.hpp"
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namespace GPU {
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namespace Port {
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enum struct SemiTransparency {
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B_Half_add_F_Half = 0,
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B_add_F = 1,
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B_sub_F = 2,
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B_add_F_Quarter = 3,
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};
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enum struct TexturePageColor {
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_4bit = 0,
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_8bit = 1,
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_15bit = 2,
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};
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enum struct HorizontalResolution {
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_256 = 0,
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_320 = 1,
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_512 = 2,
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_640 = 3,
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};
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enum struct VerticalResolution {
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_240 = 0,
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_480 = 1
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};
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enum struct DMADirection {
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Off = 0,
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Fifo = 1,
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CPU2GPU = 2,
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GPU2CPU = 3,
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};
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enum struct DisplayState {
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On = 0,
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Off = 1
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};
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namespace Command {
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struct __no_align GP0 : public ComplexBitMap<uint32_t> {
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__io_port_inherit_complex_bit_map(GP0);
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static constexpr GP0 QuickFill(Color24 color) {
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return ComplexBitMap{(0x02 << 24) | color.raw()};
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}
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static constexpr GP0 CPU2VRAM_Blitting() {
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return ComplexBitMap{(0b101u << 29)};
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}
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static constexpr GP0 TopLeftPosition(uint16_t x, uint16_t y) {
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return ComplexBitMap{static_cast<uint32_t>((y << 16u) | x)};
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}
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static constexpr GP0 WidthHeight(uint16_t w, uint16_t h) {
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return ComplexBitMap{static_cast<uint32_t>((h << 16u) | w)};
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}
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};
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struct __no_align GP1 : public ComplexBitMap<uint32_t> {
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__io_port_inherit_complex_bit_map(GP1);
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static constexpr uint32_t construct_cmd(uint8_t cmd, uint32_t value) {
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return ((cmd << 24) | value);
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}
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static constexpr GP1 Reset() {
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return ComplexBitMap{0};
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}
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static constexpr GP1 ResetCMDBufer() {
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return ComplexBitMap{construct_cmd(0x01, 0)};
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}
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static constexpr GP1 SetDisplayState(DisplayState state) {
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return ComplexBitMap{construct_cmd(0x03, static_cast<uint32_t>(state))};
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}
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static constexpr GP1 DMADirection(DMADirection dir) {
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return ComplexBitMap{construct_cmd(0x04, static_cast<uint32_t>(dir))};
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}
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};
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}
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struct __no_align GPUStatusRegister : public ComplexBitMap<uint32_t> {
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static constexpr auto DrawingOddLinesInterlaced = Bit<uint32_t>(31);
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static constexpr auto DMADirectionValue = BitRange<DMADirection>::from_to(29, 30);
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static constexpr auto DMAReady = Bit<uint32_t>(28);
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static constexpr auto VRAMtoCPUtransferReay = Bit<uint32_t>(27);
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static constexpr auto GP0ReadyForCMD = Bit<uint32_t>(26);
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static constexpr auto FifoNotFull = Bit<uint32_t>(25); // Only for Fifo
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static constexpr auto InterruptRequest = Bit<uint32_t>(24);
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static constexpr auto DisplayDisabled = Bit<uint32_t>(23);
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static constexpr auto VerticalInterlaceOn = Bit<uint32_t>(22);
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static constexpr auto DisplayAreaColorDepth24bit = Bit<uint32_t>(21);
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static constexpr auto VideoModePal = Bit<uint32_t>(20);
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static constexpr auto VerticalResolutionValue = BitRange<VerticalResolution>::from_to(19, 19);
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static constexpr auto HorizontalResolutionValue = BitRange<HorizontalResolution>::from_to(17, 18);
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static constexpr auto HorizontalResolution368 = Bit<uint32_t>(16);
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static constexpr auto TexturesDisabled = Bit<uint32_t>(15);
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static constexpr auto NotDrawingMaskedPixels = Bit<uint32_t>(12);
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static constexpr auto MaskBitSetDuringDrawEnabled = Bit<uint32_t>(11);
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static constexpr auto DrawingToDisplayAreadAllowed = Bit<uint32_t>(10);
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static constexpr auto DitherEnabled = Bit<uint32_t>(9);
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static constexpr auto TexturePageColorValue = BitRange<TexturePageColor>::from_to(7, 8);
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static constexpr auto SemiTransparencyValue = BitRange<SemiTransparency>::from_to(5, 6);
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static constexpr auto TexturePageY = BitRange<uint32_t>::from_to(4, 4); // N*256
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static constexpr auto TexturePageX = BitRange<uint32_t>::from_to(0, 3); // N*64
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static constexpr auto VerticalResolution480 = Bit<uint32_t>(19);
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static constexpr auto TexturePageY256 = Bit<uint32_t>(4);
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};
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__declare_io_port_global(Command::GP0, GP0, 0x1F801810);
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__declare_io_port_global(Command::GP1, GP1, 0x1F801814);
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__declare_io_port_global_const(uint32_t, GPUREAD, 0x1F801810);
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__declare_io_port_global_const(GPUStatusRegister, GPUSTAT, 0x1F801814);
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}
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}
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#endif //!__JABYENGINE_GPU_IO_HPP__
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