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Merge branch 'main' into GPU-Setup

This commit is contained in:
jaby 2022-09-07 19:49:51 +02:00
parent 9ae81fa697 b590d4c870
commit 24244307a5
4 changed files with 124 additions and 122 deletions
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226
include/PSX/System/IOPorts/DMA_IO.hpp
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@ -3,140 +3,142 @@
#include "IOPort.hpp"
namespace DMA {
struct __no_align MADR : public ComplexBitMap<uint32_t> {
__io_port_inherit_complex_bit_map(MADR);
namespace Port {
struct __no_align MADR : public ComplexBitMap<uint32_t> {
__io_port_inherit_complex_bit_map(MADR);
static constexpr BitRange<uint32_t> MemoryAdr = BitRange<uint32_t>::from_to(0, 23);
};
struct __no_align BCR : public ComplexBitMap<uint32_t> {
__io_port_inherit_complex_bit_map(BCR);
struct __no_align SyncMode0 {
static constexpr BitRange<uint16_t> NumberOfWords = BitRange<uint16_t>::from_to(0, 15);
static constexpr Bit<uint16_t> CD_OneBlock = 16;
static constexpr BitRange<uint32_t> MemoryAdr = BitRange<uint32_t>::from_to(0, 23);
};
struct __no_align SyncMode1 {
static constexpr BitRange<uint16_t> BlockSize = BitRange<uint16_t>::from_to(0, 15);
static constexpr BitRange<uint16_t> BlockAmount = BitRange<uint16_t>::from_to(16, 31);
struct __no_align BCR : public ComplexBitMap<uint32_t> {
__io_port_inherit_complex_bit_map(BCR);
struct __no_align SyncMode0 {
static constexpr BitRange<uint16_t> NumberOfWords = BitRange<uint16_t>::from_to(0, 15);
static constexpr Bit<uint16_t> CD_OneBlock = 16;
};
struct __no_align SyncMode1 {
static constexpr BitRange<uint16_t> BlockSize = BitRange<uint16_t>::from_to(0, 15);
static constexpr BitRange<uint16_t> BlockAmount = BitRange<uint16_t>::from_to(16, 31);
};
struct __no_align SyncMode2 {
};
};
struct __no_align SyncMode2 {
};
};
struct __no_align CHCHR : public ComplexBitMap<uint32_t> {
__io_port_inherit_complex_bit_map(CHCHR);
struct __no_align CHCHR : public ComplexBitMap<uint32_t> {
__io_port_inherit_complex_bit_map(CHCHR);
enum _SyncMode {
Sync0 = 0, //Start immediately,
Sync1 = 1, //Sync blocks to DMA requests
Sync2 = 2, //Linked List
};
enum _SyncMode {
Sync0 = 0, //Start immediately,
Sync1 = 1, //Sync blocks to DMA requests
Sync2 = 2, //Linked List
static constexpr Bit<uint32_t> ManualStart = 28;
static constexpr Bit<uint32_t> Start = 24;
static constexpr auto Busy = Start;
static constexpr BitRange<uint32_t> ChoppingCPUWindowSize = BitRange<uint32_t>::from_to(20, 22);
static constexpr BitRange<uint32_t> ChoppingDMAWindowSize = BitRange<uint32_t>::from_to(16, 18);
static constexpr BitRange<_SyncMode> SyncMode = BitRange<_SyncMode>::from_to(9, 10);
static constexpr auto UseSyncMode0 = (SyncMode << Sync0);
static constexpr auto UseSyncMode1 = (SyncMode << Sync1);
static constexpr auto UseSyncMode2 = (SyncMode << Sync2);
static constexpr Bit<uint32_t> UseChopping = 8;
static constexpr Bit<uint32_t> MemoryAdrDecreaseBy4 = 1;
static constexpr auto MemoryAdrIncreaseBy4 = !MemoryAdrDecreaseBy4;
static constexpr Bit<uint32_t> FromMainRAM = 0;
static constexpr auto ToMainRAM = !FromMainRAM;
static constexpr CHCHR StartMDECin() {
return CHCHR(0x01000201);
}
static constexpr CHCHR StartMDECout() {
return CHCHR(0x01000200);
}
static constexpr CHCHR StartGPUReceive() {
return CHCHR(0x01000201);
}
static constexpr CHCHR StartCDROM() {
return CHCHR(0x11000000);
}
static constexpr CHCHR StartSPUReceive() {
return CHCHR(0x01000201);
}
static constexpr CHCHR StartOTC() {
return CHCHR(0x11000002);
}
};
static constexpr Bit<uint32_t> ManualStart = 28;
struct __no_align Registers {
MADR adr;
BCR block_ctrl;
CHCHR channel_ctrl;
};
static constexpr Bit<uint32_t> Start = 24;
static constexpr auto Busy = Start;
//0: Highest, 7: Lowest
typedef uint32_t Priority;
static constexpr Priority HighestPriority = 0;
static constexpr Priority LowestPriority = 7;
static constexpr BitRange<uint32_t> ChoppingCPUWindowSize = BitRange<uint32_t>::from_to(20, 22);
static constexpr BitRange<uint32_t> ChoppingDMAWindowSize = BitRange<uint32_t>::from_to(16, 18);
struct __no_align DMAControlRegister : public ComplexBitMap<uint32_t> {
__io_port_inherit_complex_bit_map(DMAControlRegister);
static constexpr BitRange<_SyncMode> SyncMode = BitRange<_SyncMode>::from_to(9, 10);
static constexpr auto UseSyncMode0 = (SyncMode << Sync0);
static constexpr auto UseSyncMode1 = (SyncMode << Sync1);
static constexpr auto UseSyncMode2 = (SyncMode << Sync2);
static constexpr Bit<uint32_t> OTCEnable = 27;
static constexpr BitRange<Priority> OTCPriority = BitRange<Priority>::from_to(24, 26);
static constexpr Bit<uint32_t> UseChopping = 8;
static constexpr Bit<uint32_t> PIOEnable = 23;
static constexpr BitRange<Priority> PIOPriority = BitRange<Priority>::from_to(20, 22);
static constexpr Bit<uint32_t> MemoryAdrDecreaseBy4 = 1;
static constexpr auto MemoryAdrIncreaseBy4 = !MemoryAdrDecreaseBy4;
static constexpr Bit<uint32_t> SPUEnable = 19;
static constexpr BitRange<Priority> SPUPriority = BitRange<Priority>::from_to(16, 18);
static constexpr Bit<uint32_t> FromMainRAM = 0;
static constexpr auto ToMainRAM = !FromMainRAM;
static constexpr Bit<uint32_t> CDROMEnable = 15;
static constexpr BitRange<Priority> CDROMPriority = BitRange<Priority>::from_to(12, 14);
static constexpr CHCHR StartMDECin() {
return CHCHR(0x01000201);
}
static constexpr Bit<uint32_t> GPUEnable = 11;
static constexpr BitRange<Priority> GPUPriority = BitRange<Priority>::from_to(8, 10);
static constexpr CHCHR StartMDECout() {
return CHCHR(0x01000200);
}
static constexpr Bit<uint32_t> MDECoutEnable = 7;
static constexpr BitRange<Priority> MDECoutPriority = BitRange<Priority>::from_to(4, 6);
static constexpr CHCHR StartGPUReceive() {
return CHCHR(0x01000201);
}
static constexpr Bit<uint32_t> MDECinEnable = 3;
static constexpr BitRange<Priority> MDECinPriority = BitRange<Priority>::from_to(0, 2);
};
static constexpr CHCHR StartCDROM() {
return CHCHR(0x11000000);
}
struct __no_align DMAInterruptRegister : public ComplexBitMap<uint32_t> {
__io_port_inherit_complex_bit_map(DMAInterruptRegister);
static constexpr CHCHR StartSPUReceive() {
return CHCHR(0x01000201);
}
static constexpr Bit<uint32_t> MasterEnable = 31;
static constexpr BitRange<uint32_t> Flags = BitRange<uint32_t>::from_to(24, 30);
static constexpr Bit<uint32_t> MasterEnableDPCR = 23;
static constexpr BitRange<uint32_t> EnableDPCR = BitRange<uint32_t>::from_to(16, 22);
static constexpr Bit<uint32_t> ForceIRQ = 15;
};
static constexpr CHCHR StartOTC() {
return CHCHR(0x11000002);
}
};
__declare_io_port_global(Registers, MDECin, 0x1F801080);
__declare_io_port_global(Registers, MDECout, 0x1F801090);
__declare_io_port_global(Registers, GPU, 0x1F8010A0);
__declare_io_port_global(Registers, CDROM, 0x1F8010B0);
__declare_io_port_global(Registers, SPU, 0x1F8010C0);
__declare_io_port_global(Registers, PIO, 0x1F8010D0);
__declare_io_port_global(Registers, OTC, 0x1F8010E0);
struct __no_align Registers {
MADR adr;
BCR block_ctrl;
CHCHR channel_ctrl;
};
//0: Highest, 7: Lowest
typedef uint32_t Priority;
static constexpr Priority HighestPriority = 0;
static constexpr Priority LowestPriority = 7;
struct __no_align DMAControlRegister : public ComplexBitMap<uint32_t> {
__io_port_inherit_complex_bit_map(DMAControlRegister);
static constexpr Bit<uint32_t> OTCEnable = 27;
static constexpr BitRange<Priority> OTCPriority = BitRange<Priority>::from_to(24, 26);
static constexpr Bit<uint32_t> PIOEnable = 23;
static constexpr BitRange<Priority> PIOPriority = BitRange<Priority>::from_to(20, 22);
static constexpr Bit<uint32_t> SPUEnable = 19;
static constexpr BitRange<Priority> SPUPriority = BitRange<Priority>::from_to(16, 18);
static constexpr Bit<uint32_t> CDROMEnable = 15;
static constexpr BitRange<Priority> CDROMPriority = BitRange<Priority>::from_to(12, 14);
static constexpr Bit<uint32_t> GPUEnable = 11;
static constexpr BitRange<Priority> GPUPriority = BitRange<Priority>::from_to(8, 10);
static constexpr Bit<uint32_t> MDECoutEnable = 7;
static constexpr BitRange<Priority> MDECoutPriority = BitRange<Priority>::from_to(4, 6);
static constexpr Bit<uint32_t> MDECinEnable = 3;
static constexpr BitRange<Priority> MDECinPriority = BitRange<Priority>::from_to(0, 2);
};
struct __no_align DMAInterruptRegister : public ComplexBitMap<uint32_t> {
__io_port_inherit_complex_bit_map(DMAInterruptRegister);
static constexpr Bit<uint32_t> MasterEnable = 31;
static constexpr BitRange<uint32_t> Flags = BitRange<uint32_t>::from_to(24, 30);
static constexpr Bit<uint32_t> MasterEnableDPCR = 23;
static constexpr BitRange<uint32_t> EnableDPCR = BitRange<uint32_t>::from_to(16, 22);
static constexpr Bit<uint32_t> ForceIRQ = 15;
};
__declare_io_port_global(Registers, MDECin, 0x1F801080);
__declare_io_port_global(Registers, MDECout, 0x1F801090);
__declare_io_port_global(Registers, GPU, 0x1F8010A0);
__declare_io_port_global(Registers, CDROM, 0x1F8010B0);
__declare_io_port_global(Registers, SPU, 0x1F8010C0);
__declare_io_port_global(Registers, PIO, 0x1F8010D0);
__declare_io_port_global(Registers, OTC, 0x1F8010E0);
__declare_io_port_global(DMAControlRegister, DPCR, 0x1F8010F0);
__declare_io_port_global(DMAInterruptRegister, DICR, 0x1F8010F4);
__declare_io_port_global(DMAControlRegister, DPCR, 0x1F8010F0);
__declare_io_port_global(DMAInterruptRegister, DICR, 0x1F8010F4);
}
}
#endif //!__JABYENGINE_DMA_IO_HPP__

18
lib/pcsx-redux/ps-exe.ld
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@ -68,16 +68,16 @@ SECTIONS {
{
.planschi
{
*libJabyEngine.a:boot_*.o(.text.startup._GLOBAL__*)
*libJabyEngine.a:boot_*.o(.ctors)
*libJabyEngine.a:*_boot.o(.text.startup._GLOBAL__*)
*libJabyEngine.a:*_boot.o(.ctors)
*libJabyEngine.a:boot_*.o(.text.*)
*libJabyEngine.a:boot_*.o(.rodata*)
*libJabyEngine.a:boot_*.o(.sdata*)
*libJabyEngine.a::boot_*.o(.data*)
*libJabyEngine.a::boot_*.o(.sbss*)
*libJabyEngine.a::boot_*.o(.bss*)
*libJabyEngine.a::boot_*.o(*)
*libJabyEngine.a:*_boot.o(.text.*)
*libJabyEngine.a:*_boot.o(.rodata*)
*libJabyEngine.a:*_boot.o(.sdata*)
*libJabyEngine.a::*_boot.o(.data*)
*libJabyEngine.a::*_boot.o(.sbss*)
*libJabyEngine.a::*_boot.o(.bss*)
*libJabyEngine.a::*_boot.o(*)
}
}
__boot_loader_end = .;

2
src/Library/src/BootLoader/boot_spu.cpp → src/Library/src/BootLoader/spu_boot.cpp
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@ -3,7 +3,7 @@
namespace SPU {
using namespace Port;
using namespace DMA;
using namespace DMA::Port;
static void clear_key() {
Key::off.write(UI32_MAX);

0
src/Library/src/BootLoader/boot_start.cpp → src/Library/src/BootLoader/start_boot.cpp
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