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Improve struct and namespace usage

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jaby
2023-01-08 21:08:23 +01:00
parent 297526e4d0
commit a791f0bffd
14 changed files with 169 additions and 177 deletions
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14
include/PSX/System/IOPorts/dma_io.hpp
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@@ -3,7 +3,7 @@
#include "ioport.hpp"
namespace JabyEngine {
namespace DMA {
namespace DMA_IO {
struct __no_align MADR : public ComplexBitMap<uint32_t> {
__io_port_inherit_complex_bit_map(MADR);
@@ -130,13 +130,13 @@ namespace JabyEngine {
static constexpr auto ForceIRQ = Bit<uint32_t>(15);
};
__declare_io_port_global(Registers, MDECin, 0x1F801080);
__declare_io_port_global(Registers, MDECout, 0x1F801090);
__declare_io_port_global_struct(Registers, MDECin, 0x1F801080);
__declare_io_port_global_struct(Registers, MDECout, 0x1F801090);
__declare_io_port_global_struct(Registers, GPU, 0x1F8010A0);
__declare_io_port_global(Registers, CDROM, 0x1F8010B0);
__declare_io_port_global(Registers, SPU, 0x1F8010C0);
__declare_io_port_global(Registers, PIO, 0x1F8010D0);
__declare_io_port_global(Registers, OTC, 0x1F8010E0);
__declare_io_port_global_struct(Registers, CDROM, 0x1F8010B0);
__declare_io_port_global_struct(Registers, SPU, 0x1F8010C0);
__declare_io_port_global_struct(Registers, PIO, 0x1F8010D0);
__declare_io_port_global_struct(Registers, OTC, 0x1F8010E0);
__declare_io_port_global(DMAControlRegister, DPCR, 0x1F8010F0);
__declare_io_port_global(DMAInterruptRegister, DICR, 0x1F8010F4);

10
include/PSX/System/IOPorts/gpu_io.hpp
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@@ -4,7 +4,7 @@
#include "../../GPU/gpu_types.hpp"
namespace JabyEngine {
namespace GPU {
namespace GPU_IO {
enum struct SemiTransparency {
B_Half_add_F_Half = 0,
B_add_F = 1,
@@ -47,11 +47,11 @@ namespace JabyEngine {
Off = 1
};
namespace Command {
struct Command {
struct __no_align GP0 : public ComplexBitMap<uint32_t> {
__io_port_inherit_complex_bit_map(GP0);
static constexpr GP0 QuickFill(Color24 color) {
static constexpr GP0 QuickFill(GPU::Color24 color) {
return ComplexBitMap{(0x02 << 24) | color.raw()};
}
@@ -132,7 +132,7 @@ namespace JabyEngine {
return ComplexBitMap{construct_cmd(0x08, mode)};
}
};
}
};
struct __no_align GPUStatusRegister : public ComplexBitMap<uint32_t> {
static constexpr auto DrawingOddLinesInterlaced = Bit<uint32_t>(31);
@@ -144,7 +144,7 @@ namespace JabyEngine {
static constexpr auto InterruptRequest = Bit<uint32_t>(24);
static constexpr auto DisplayDisabled = Bit<uint32_t>(23);
static constexpr auto VerticalInterlaceOn = Bit<uint32_t>(22);
static constexpr auto DisplayAreaColorDepth = BitRange<GPU::DisplayAreaColorDepth>::from_to(21, 21);
static constexpr auto DisplayAreaColorDepth = BitRange<GPU_IO::DisplayAreaColorDepth>::from_to(21, 21);
static constexpr auto VideoModePal = Bit<uint32_t>(20);
static constexpr auto VerticalResolutionValue = BitRange<VerticalResolution>::from_to(19, 19);
static constexpr auto HorizontalResolutionValue = BitRange<HorizontalResolution>::from_to(17, 18);

16
include/PSX/System/IOPorts/interrupt_io.hpp
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@@ -3,7 +3,7 @@
#include "ioport.hpp"
namespace JabyEngine {
namespace Interrupt {
struct Interrupt {
static constexpr auto VBlank = Bit<uint32_t>(0);
static constexpr auto GPU = Bit<uint32_t>(1);
static constexpr auto CDROM = Bit<uint32_t>(2);
@@ -17,16 +17,16 @@ namespace JabyEngine {
static constexpr auto Controller = Bit<uint32_t>(10);
static constexpr auto LightPen = Controller;
struct __no_align IRQStatus : public ComplexBitMap<uint32_t> {
__io_port_inherit_complex_bit_map(IRQStatus);
struct __no_align Status : public ComplexBitMap<uint32_t> {
__io_port_inherit_complex_bit_map(Status);
};
struct __no_align IRQMask : public ComplexBitMap<uint32_t> {
__io_port_inherit_complex_bit_map(IRQMask);
struct __no_align Mask : public ComplexBitMap<uint32_t> {
__io_port_inherit_complex_bit_map(Mask);
};
__declare_io_port_global(IRQStatus, Status, 0x1F801070);
__declare_io_port_global(IRQMask, Mask, 0x1F801074);
__declare_io_port_member(struct Status, Status, 0x1F801070);
__declare_io_port_member(struct Mask, Mask, 0x1F801074);
static bool is_irq(Bit<uint32_t> irq) {
return Status.read().is_bit_set(irq);
@@ -43,7 +43,7 @@ namespace JabyEngine {
static void enable_irq(Bit<uint32_t> irq) {
Mask.write(Mask.read().set_bit(irq));
}
}
};
}
#endif //!__JABYENGINE_INTERRUPT_IO_HPP__

3
include/PSX/System/IOPorts/ioport.hpp
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@@ -69,6 +69,9 @@ namespace JabyEngine {
#define __declare_io_port_global(type, name, adr) __declare_io_port_global_raw(, type, name, adr)
#define __declare_io_port_global_const(type, name, adr) __declare_io_port_global_raw(const, type, name, adr)
#define __declare_io_port_member(type, name, adr) __declare_io_port_global_raw(inline, type, name, adr)
#define __declare_io_port_member_const(type, name, adr) __declare_io_port_global_raw(const inline, type, name, adr)
#define __declare_io_port_global_array(type, name, adr, size) static __always_inline auto& name = reinterpret_cast<type(&)[size]>(*reinterpret_cast<type*>((IO_Base_Adr + (adr & ~IO_Base_Mask))))
#define __declare_io_port_global_struct(type, name, adr) static __always_inline auto& name = *reinterpret_cast<type*>(__io_port_adr(adr))

52
include/PSX/System/IOPorts/spu_io.hpp
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@@ -3,7 +3,7 @@
#include "ioport.hpp"
namespace JabyEngine {
namespace SPU {
namespace SPU_IO {
enum struct Mode {
Linear = 0,
Exponential = 1,
@@ -129,34 +129,34 @@ namespace JabyEngine {
static constexpr size_t VoiceCount = 24;
namespace Key {
__declare_io_port_global(ubus32_t, on, 0x1F801D88);
__declare_io_port_global(ubus32_t, off, 0x1F801D8C);
__declare_io_port_global(ubus32_t, status, 0x1F801D9C);
}
struct Key {
__declare_io_port_member(ubus32_t, On, 0x1F801D88);
__declare_io_port_member(ubus32_t, Off, 0x1F801D8C);
__declare_io_port_member(ubus32_t, Status, 0x1F801D9C);
};
namespace MainVolume {
__declare_io_port_global(SweepVolume, left, 0x1F801D80);
__declare_io_port_global(SweepVolume, right, 0x1F801D82);
}
struct MainVolume {
__declare_io_port_member(SweepVolume, Left, 0x1F801D80);
__declare_io_port_member(SweepVolume, Right, 0x1F801D82);
};
namespace CDVolume {
__declare_io_port_global(SimpleVolume, left, 0x1F801DB0);
__declare_io_port_global(SimpleVolume, right, 0x1F801DB2);
}
struct CDVolume {
__declare_io_port_member(SimpleVolume, Left, 0x1F801DB0);
__declare_io_port_member(SimpleVolume, Right, 0x1F801DB2);
};
namespace ExternalAudioInputVolume {
__declare_io_port_global(SimpleVolume, left, 0x1F801DB4);
__declare_io_port_global(SimpleVolume, right, 0x1F801DB6);
}
struct ExternalAudioInputVolume {
__declare_io_port_member(SimpleVolume, Left, 0x1F801DB4);
__declare_io_port_member(SimpleVolume, Right, 0x1F801DB6);
};
namespace Reverb {
namespace Volume {
__declare_io_port_global(SimpleVolume, left, 0x1F801D84);
__declare_io_port_global(SimpleVolume, right, 0x1F801D86);
}
__declare_io_port_global(uint16_t, work_area_adr, 0x1F801DA2);
}
struct Reverb {
struct Volume {
__declare_io_port_member(SimpleVolume, Left, 0x1F801D84);
__declare_io_port_member(SimpleVolume, Right, 0x1F801D86);
};
__declare_io_port_member(uint16_t, WorkAreaAdr, 0x1F801DA2);
};
__declare_io_port_global(ControlRegister, Control, 0x1F801DAA);
__declare_io_port_global(uint16_t, DataTransferControl, 0x1F801DAC);
@@ -164,7 +164,7 @@ namespace JabyEngine {
__declare_io_port_global(NoiseGenerator, NON, 0x1F801D94);
__declare_io_port_global(EchoOn, EON, 0x1F801D98);
__declare_io_port_global_array(Voice, Voices, 0x1F801C00, VoiceCount);
__declare_io_port_global_array(struct Voice, Voice, 0x1F801C00, VoiceCount);
}
}
#endif //!__JABYENGINE_SPU_IO_HPP__

28
include/PSX/System/IOPorts/timer_io.hpp
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@@ -3,9 +3,7 @@
#include "ioport.hpp"
namespace JabyEngine {
namespace Timer {
enum struct SyncMode {};
namespace Timer_IO {
struct __no_align CounterMode : public ComplexBitMap<uint32_t> {
__io_port_inherit_complex_bit_map(CounterMode);
@@ -31,19 +29,19 @@ namespace JabyEngine {
static constexpr auto CounterTargetValue = BitRange<uint32_t>::from_to(0, 15);
};
struct __no_align TimerInfo {
struct __no_align Counter {
IOPort<uint32_t> value;
IOPort<CounterMode> mode;
IOPort<CounterTarget> target;
private:
uint32_t _unused[1];
uint32_t _unused;
};
static constexpr uintptr_t counter_base_adr(size_t ID) {
return (0x1F801100 + (ID*0x10));
}
namespace Counter0 {
struct __no_align Counter0 : public Counter {
struct SyncMode {
static constexpr auto Pause_During_Hblank = CounterMode::SyncMode.with(0);
static constexpr auto Zero_At_Hblank = CounterMode::SyncMode.with(1);
@@ -57,11 +55,9 @@ namespace JabyEngine {
static constexpr auto System_Clock_Too = CounterMode::ClockSource.with(2);
static constexpr auto Dot_Clock_Too = CounterMode::ClockSource.with(3);
};
};
__declare_io_port_global_struct(TimerInfo, Timer, counter_base_adr(0));
}
namespace Counter1 {
struct __no_align Counter1 : public Counter {
struct SyncMode {
static constexpr auto Pause_During_Vblank = CounterMode::SyncMode.with(0);
static constexpr auto Zero_At_Vblank = CounterMode::SyncMode.with(1);
@@ -75,11 +71,9 @@ namespace JabyEngine {
static constexpr auto System_Clock_Too = CounterMode::ClockSource.with(2);
static constexpr auto Hblank_Too = CounterMode::ClockSource.with(3);
};
};
__declare_io_port_global_struct(TimerInfo, Timer, counter_base_adr(1));
}
namespace Counter2 {
struct __no_align Counter2 : public Counter {
struct SyncMode {
static constexpr auto Stop_Counter = CounterMode::SyncMode.with(0);
static constexpr auto Freerun = CounterMode::SyncMode.with(1);
@@ -93,9 +87,11 @@ namespace JabyEngine {
static constexpr auto System_Clock_Div_8 = CounterMode::ClockSource.with(2);
static constexpr auto System_Clock_Div_8_Too = CounterMode::ClockSource.with(3);
};
};
__declare_io_port_global_struct(TimerInfo, Timer, counter_base_adr(2));
}
__declare_io_port_global_struct(struct Counter0, Counter0, counter_base_adr(0));
__declare_io_port_global_struct(struct Counter1, Counter1, counter_base_adr(1));
__declare_io_port_global_struct(struct Counter2, Counter2, counter_base_adr(2));
}
}